SLVS850A
June 2008 – September 2023
TPS2551-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configurations and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Overcurrent
8.3.2
Reverse-Voltage Protection
8.3.3
FAULT Response
8.3.4
Undervoltage Lockout (UVLO)
8.3.5
Enable (EN)
8.3.6
Thermal Sense
8.3.7
Device Functional Modes
8.4
Programming
8.4.1
Programming the Current-Limit Threshold
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Two-Level Current-Limit Circuit
9.2.2
Design Requirements
9.2.3
Detail Design Procedure
9.2.3.1
Designing Above a Minimum Current Limit
9.2.3.2
Designing Below a Maximum Current Limit
9.2.3.3
Input and Output Capacitance
9.2.4
Auto-Retry Functionality
9.2.5
Latch-Off Functionality
9.2.6
Typical Application as USB Power Switch
9.2.6.1
Design Requirements
9.2.6.1.1
USB Power-Distribution Requirements
9.2.6.2
Detail Design Procedure
9.2.6.2.1
Universal Serial Bus (USB) Power-Distribution Requirements
9.3
Power Supply Recommendations
9.3.1
Self-Powered and Bus-Powered Hubs
9.3.2
Low-Power Bus-Powered and High-Power Bus-Powered Functions
9.3.3
Power Dissipation and Junction Temperature
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
Support Resources
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DBV|6
MPDS026Q
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvs850a_oa
slvs850a_pm
7
Parameter Measurement Information
Figure 7-1
Test Circuit and Voltage Waveforms
Figure 7-2
Response Time to Short-Circuit Waveform
Figure 7-3
Output Voltage vs. Current-Limit Threshold