SLVSDJ5D August   2016  – January 2018 TPS25741 , TPS25741A

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Implementations in DFP Host Ports
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 VBUS Capacitance
      2. 8.1.2 USB Data Communications
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  USB Type-C CC Logic (CC1, CC2)
      2. 8.3.2  9.3.2 VCONN Supply (VCONN, CC1, CC2)
      3. 8.3.3  USB Power Delivery BMC Transmission (CC1, CC2, VTX)
      4. 8.3.4  USB Power Delivery BMC Reception (CC1, CC2)
      5. 8.3.5  Discharging (DSCG, VPWR)
        1. 8.3.5.1 Discharging after a Fault (VPWR)
      6. 8.3.6  Configuring Voltage Capabilities (HIPWR, EN9V, EN12V)
      7. 8.3.7  Configuring Power Capabilities (PSEL, PCTRL, HIPWR)
      8. 8.3.8  Gate Drivers
        1. 8.3.8.1 GDNG, GDNS
        2. 8.3.8.2 G5V
        3. 8.3.8.3 GDPG
      9. 8.3.9  Fault Monitoring and Protection
        1. 8.3.9.1 Over/Under Voltage (VBUS)
        2. 8.3.9.2 Over-Current Protection (ISNS, VBUS)
        3. 8.3.9.3 System Fault Input (GD, VPWR)
      10. 8.3.10 Voltage Control (CTL1, CTL2)
      11. 8.3.11 Sink Attachment Indicator (UFP, DVDD)
      12. 8.3.12 Accessory Attachment Indicator (AUDIO, DEBUG)
      13. 8.3.13 Plug Polarity Indication (POL)
      14. 8.3.14 Power Supplies (VAUX, VDD, VPWR, DVDD)
      15. 8.3.15 Grounds (AGND, GND)
      16. 8.3.16 Output Power Supply (DVDD)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Sleep Mode
      2. 8.4.2 Checking VBUS at Start Up
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 System-Level ESD Protection
      2. 9.1.2 Use of GD Internal Clamp
      3. 9.1.3 Resistor Divider on GD for Programmable Start Up
      4. 9.1.4 Selection of the CTL1 and CTL2 Resistors (RFBL1 and RFBL2)
      5. 9.1.5 Voltage Transition Requirements
      6. 9.1.6 VBUS Slew Control using GDNG CSLEW
      7. 9.1.7 Tuning OCP Using RF and CF
    2. 9.2 Typical Applications
      1. 9.2.1 A/C Multiplexing Power Source
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Power Pin Bypass Capacitors
          2. 9.2.1.2.2 Non-Configurable Components
          3. 9.2.1.2.3 Configurable Components
        3. 9.2.1.3 Application Curves
      2. 9.2.2 D/C Power Source
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Power Pin Bypass Capacitors
          2. 9.2.2.2.2 Non-Configurable Components
          3. 9.2.2.2.3 Configurable Components
        3. 9.2.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 A/C Power Source (Wall Adapter)
      2. 9.3.2 Dual-Port Power Managed A/C Power Source (Wall Adapter)
  10. 10Power Supply Recommendations
    1. 10.1 VDD
    2. 10.2 VCONN
    3. 10.3 VPWR
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Port Current Kelvin Sensing
      2. 11.1.2 Power Pin Bypass Capacitors
      3. 11.1.3 Supporting Components
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from C Revision (June 2017) to D Revision

  • Deleted Application: Automotive InfotainmentGo

Changes from B Revision (January 2017) to C Revision

  • Changed Shunt capacitance, VCONN value From: MAX = 10 µF To: MIN = 10 µF MAX = 220 µF in the Recommended Operating Conditions tableGo
  • Deleted the row for TPS25741A Input resistance, and changed the MAX value From: 5 MΩ To: 6 MΩ in the Electrical Characteristics tableGo
  • Changed the Unloaded output voltage on CC pin MIN value From: 2.8 V to 2.7 V and the MAX value From: 5.5 V to 4.35 V in the Electrical Characteristics tableGo
  • Deleted tWD Watchdog Timer from the Timing Requirements tableGo
  • Deleted tST row for TPS25741A in the Switching Characteristics tableGo
  • Deleted the last sentence from the Sleep Mode section: "The TPS25741 will wake up every tWD and check for a connection before returning to sleep mode"Go
  • Added test: "The TPS25740/TPS25740A Design Calculator Tool.." to the Application Information sectionGo
  • Added sentence "All slew rate control methods" to the Voltage Transition Requirements sectionGo
  • Deleted the Enabling Power Muxing Architecture sectionGo
  • Added text: "The following example is based on TPS25741..." to the A/C Multiplexing Power Source sectionGo
  • Deleted Q4 and Note from Figure 50Go
  • Changed From: A 400 pF, 50 V, ±5% COG/NPO ceramic To: A 470 pF, 50 V, ±5% COG/NPO ceramic in the Configurable Components sectionGo
  • Changed From: RF/CF: Not used To: RF/CF: Provide filtering of both ripple... in the Configurable Components sectionGo
  • Changed From: A 400 pF, 50 V, ±5% COG/NPO ceramic To: A 470 pF, 50 V, ±5% COG/NPO ceramic in the Configurable Components sectionGo
  • Added document links to the Documentation Support sectionGo

Changes from A Revision (September 2016) to B Revision

  • Added row to Input resistance for TPS25741A in the Electrical Characteristics tableGo
  • Changed the Test Conditions tWD Watchdog Timer From: CC pins floating To: CC pins floating (TPS25741) in the Timing Requirements tableGo
  • Added TPS25741 to the test conditions for tST in the Switching Characteristics table. Added row to tST for TPS25741A in the test conditions and TYP value of 30 ms in the Switching Characteristics tableGo
  • Changed the last sentence of the Sleep Mode section: From: "The TPS25741/TPS25741A will also wake up every tWD and check for a connection before returning to sleep mode." To: "The TPS25741 will wake up every tWD and check for a connection before returning to sleep mode Go
  • Changed section title From: VOUT Ripple Filtering using RF and CF To: Tuning OCP Using RF and CF. Updated section text.Go
  • Added Note to Q4 of Figure 50Go
  • Changed section title From: Dual-Port A/C Power Source (Wall Adaptor) To: Dual-Port Power Managed A/C Power Source (Wall Adaptor)Go

Changes from * Revision (August 2016) to A Revision

  • Changed From: Product Preview To: Production Data for the TPS25741Go