SLVSFE3B November   2020  – May 2021 TPS2661

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Overload Protection and Fast-Trip
      2. 8.3.2 Reverse Current Blocking for Unipolar Current Inputs (4 - 20 mA, 0 - 20 mA)
      3. 8.3.3 OUTPUT/INPUT Cutoff During Over-Voltage, Under-Voltage Due to Miswiring
        1. 8.3.3.1 Output Over-Voltage
        2. 8.3.3.2 Output or Input Under-Voltage
      4. 8.3.4 External Power Supply(±Vs)
      5. 8.3.5 Loop Testing Without ±Vs Supply (Loop Power Mode in TPS26610 Only)
        1. 8.3.5.1 Supply Sensing with VSNS For Loop Power Mode (TPS26610)
      6. 8.3.6 Enable Control (TPS26611 and TPS26612)
      7. 8.3.7 Signal Good Indicator (SGOOD)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Analog Input Protection for Current Inputs with TPS26610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure for Current Inputs with TPS26610
        1. 9.2.2.1 Selecting ±Vs Supplies for TPS26610
        2. 9.2.2.2 Selecting RBurden
        3. 9.2.2.3 Selecting MODE Configuration for TPS26610
      3. 9.2.3 Application Performance Plots for Current Inputs with TPS26610
    3. 9.3 Typical Application: Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure for Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
        1. 9.3.2.1 Selecting ±Vs Supplies for TPS26611
        2. 9.3.2.2 Selecting MODE Configuration for TPS26611
        3. 9.3.2.3 Selecting Bias Resistors R1, R2 for Setting Common Mode Voltage for Voltage Inputs
      3. 9.3.3 Application Performance Plots for V/I Inputs with TPS26611
    4. 9.4 System Examples
      1. 9.4.1 Power Supply Protection of 2-Wire Transmitter with TPS26612
      2. 9.4.2 Protection of 3-Wire Transmitters and Analog Output Modules with TPS26611/12
      3. 9.4.3 UART IO Protection with TPS26611/12
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Output or Input Under-Voltage

The TPS2661x devices provide protection from under-votage events on IN and OUT pins by turning off the internal Pass FETs and cutting off the signal path whenever VOUT or VIN goes below VO/I_UVLO threshold. The signal path through TPS2661x is restored again when VOUT or VIN goes above [VO/I_UVLO - VO/I_UVLO_Hyst] value. The device turns off the internal FETs within a time of tO/I_UV_CUT after output or input voltage has gone below VO/I_UVLO threshold. The device recovers from output or input under-voltage within a time of tOUT_CUT_Rec after output or input voltage has gone above [VO/I_UVLO - VO/I_UVLO_Hyst] voltage. See Timing Requirements in Specifications for tO/I_UV_CUT and tOUT_CUT_Rec.
GUID-032BF230-9B2B-4B6A-852A-ECCD45D0A557-low.gif Figure 8-10 Output/Input Cutoff.
In case of over-voltage, under-voltage and miswiring events on IN and OUT pins, voltages exceeding Absolute Maximum Ratings (see Specifications) for IN and OUT Pins can damage the device. Figure 8-11 and Figure 8-12 illustrate the output and input under-voltage protection in TPS2661x devices.
GUID-20201030-CA0I-ZGSL-6KFB-C2F1DK2H5QNH-low.pngFigure 8-11 Output Under-Voltage Protection.
GUID-20201030-CA0I-DSFF-K8LB-MVXW7GT5B9DS-low.pngFigure 8-12 Input Under-Voltage Protection.