SLVSFE3C November   2020  – December 2021 TPS2661

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Overload Protection and Fast-Trip
      2. 8.3.2 Reverse Current Blocking for Unipolar Current Inputs TPS26610, TPS26611 and TPS26612 (4–20 mA, 0–20 mA)
      3. 8.3.3 OUTPUT and INPUT Cutoff During Overvoltage, Undervoltage Due to Miswiring
        1. 8.3.3.1 Output Overvoltage With TPS2661x Devices
        2. 8.3.3.2 Output or Input Undervoltage With TPS26610, TPS26611 and TPS26612
        3. 8.3.3.3 Output Undervoltage With TPS26613 and TPS26614
      4. 8.3.4 External Power Supply (±Vs)
      5. 8.3.5 Loop Testing Without ±Vs Supply (Loop Power Mode in TPS26610, TPS26613 Only)
        1. 8.3.5.1 Supply Sensing With VSNS for Loop Power Mode With TPS26610 and TPS26613
      6. 8.3.6 Enable Control With TPS26611, TPS26612, and TPS26614
      7. 8.3.7 Signal Good Indicator (SGOOD)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Analog Input Protection for Current Inputs with TPS26610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure for Current Inputs with TPS26610
        1. 9.2.2.1 Selecting ±Vs Supplies for TPS26610
        2. 9.2.2.2 Selecting RBurden
        3. 9.2.2.3 Selecting MODE Configuration for TPS26610
      3. 9.2.3 Application Performance Plots for Current Inputs with TPS26610
    3. 9.3 Typical Application: Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure for Analog Input Protection for Multiplexed Current and Voltage Inputs with TPS26611
        1. 9.3.2.1 Selecting ±Vs Supplies for TPS26611
        2. 9.3.2.2 Selecting MODE Configuration for TPS26611
        3. 9.3.2.3 Selecting Bias Resistors R1, R2 for Setting Common Mode Voltage for Voltage Inputs
      3. 9.3.3 Application Performance Plots for V/I Inputs with TPS26611
    4. 9.4 System Examples
      1. 9.4.1 Power Supply Protection of 2-Wire Transmitter with TPS26612
      2. 9.4.2 Protection of 3-Wire Transmitters and Analog Output Modules With TPS26611, TPS26612
      3. 9.4.3 UART IO Protection With TPS26611, TPS26612
      4. 9.4.4 Higher Loop Impedance With TPS26613 and TPS26614
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

–40° C ≤ TA = TJ ≤ +125° C, 2.25 V < +Vs < 30 V, -20 V < -Vs < 0 V, MODE = GND, SGOOD = Open, EN = 3.3 V (All voltages referenced to GND, (unless otherwise noted))
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SIGNAL INPUT (IN)
V(IN) IN Signal Voltage –50 50 V
IQ Sum of Leakage Cureent from IN  and OUT pins to GND in normal operation (–Vs) < VIN , VOUT < (+Vs – 0.35 V) –0.1 0.1 µA
(+Vs – 0.35 V) < VIN, VOUT < +Vs 1 uA
IQFLT Sum of leakage current  from IN and OUT pins to -Vs pin during fault as percentage of loop current VIN > +Vs, Current Limit Operation 20 %
I(OL) Bipolar current limit V(IN)-V(OUT) = ±1 V, -Vs connected to negative supply ±25 ±32 ±40 mA
Unipolar Current limit  V(IN)–V(OUT) = +1 V, -Vs connected to GND 25 32 40 mA
Unipolar current limit with VIN < -VS V(IN) = –24-V V(OUT) = –19 V, –Vs = –20 V. TPS26613/14 Only –40 –32 –25 mA
I(OL_Pulse) Transient Pulse Over Current Limit V(IN)–V(OUT) = +1.5 V, MODE = Floating 50 60 72 mA
I(FASTRIP) Fast-trip current limit MODE = GND ±65 ±165 mA
MODE = Floating or 180 kΩ to GND ±140 ±275 mA
IOff-Lkg-IN + IOff-Lkg-OUT Sum of leakage current from IN and OUT pins in Off state (Source) -12.5 V < VIN <12.5 V; VOUT = 0 V; EN = Low; +Vs = 15V; (-Vs) = -15 V ,TPS26611/12/14 Only –9.75 –5.25 µA
-12.5 V < VOUT < 12.5 V; VIN = 0 V; EN = Low; +Vs = 15V; (-Vs) = -15 V, TPS26611/12/14 Only –9.75 –5.25 µA
IOff-Lkg-IN Leakage current from IN pin in Off state (Source) -12.5 V< VIN <12.5 V; VOUT = 0 V; EN = Low; +Vs = 15V; (-Vs) = -15 V ,TPS26611/12/14 Only –6 –1 µA
IOff-Lkg-OUT Leakage current from OUT pin in Off state (Source) -12.5 V < VOUT < 12.5 V; VIN = 0 V; EN = Low; +Vs = 15V; (-Vs) = -15 V ,TPS26611/12/14 Only –6 –1 µA
Overvoltage and Undervoltage Cutoff for OUT  Pin
VOUT_OVLO OUT Overvoltage Protection Threshold, Rising TPS26610/11/13/14 Only (+Vs)+0.05 (+Vs)+0.30 V
TPS26612 Only (+Vs)+1 (+Vs)+1.50 V
VOUT_OVLO_hyst OUT Overvoltage Hysterises 30 75 mV
VO/I_UVLO OUT/IN Undervoltage
Protection Threshold,
Falling
TPS26610/11/12 Only (–Vs)-0.40 (–Vs)-0.20 V
VO/I_UVLO_hyst OUT/IN undervoltage
Hysterises
TPS26610/11/12 Only 30 75 mV
VO_UVLO OUT Undervoltage Protection Threshold, Falling TPS26613/14 Only (–Vs)-0.40 (–Vs)-0.20 V
VO_UVLO_hyst OUT undervoltage Hysterises TPS26613/14 Only 30 75 mV
POWER SUPPLY PINS (+Vs/-Vs)
V(+Vs) +Vs Supply Operating Voltage TPS26610/11/13/14 2.25 30 V
V(+Vs) +Vs Supply Operating Voltage TPS26612 only 4 30 V
V(-Vs) -Vs Supply Operating Voltage –20 0 V
Vs_DIFF Difference between +Vs and -Vs 3 50 V
I(+Vs) Current sourced from +Vs supply to GND in normal operation SGOOD = Floating 1.07 1.65 mA
I(+Vs) Current sourced from +Vs supply to GND in fault operation SGOOD = Floating 1.2 1.75 mA
I(-Vs) Current sinked by -Vs supply from GND 0.2 mA
IVS_OFF  OFF State Supply Current  EN = Low (TPS26611/12/14 only) 0.27 mA
Loop Testing Vs/-Vs UNPOWERED (TPS26610/13 only)
V(IN-OUT)no_Vs Current Loop Testing : IN to OUT Voltage drop +/-20mA current through IN pin  ±5 ±8.5 V
IQno_Vs Percentage of forced IN current going to -Vs pin 20 %
IOL_noVs No supply current limit ±22 ±45.5 mA
PASS FET
RON IN to OUT total ON resistance –40 ℃ < T < 125 ℃, I(IN) < Overload Current 4.8 7.5 12.5 Ω
ENABLE (EN) TPS26611/12/14 Only
V(ENR) EN Rising Threshold 1.72 V
V(ENF) EN Falling Threshold 1 V
I(EN_LKG) EN Leakage Current (Sink) V(EN) = 5.5 V 10 µA
I(EN_LKG) EN Leakage Current (Source) V(EN) = 0 V -10 µA
V(EN) EN Open Circuit Voltage I(EN) = –0.1 µA 2.1 2.5 V
VSNS (Supply Sensing) TPS26610/13 only
V(SNSR) VSNS Rising threshold 1.72 V
V(SNSF) VSNS Falling threshold 1 V
SIGNAL GOOD (SGOOD)
VOH_SGOOD SGOOD Output Level, HIGH (+Vs) ≤ 2.5 V,  0 mA < ISGOOD < 1 mA  (+Vs)*(0.8) (+Vs) V
VOH_SGOOD SGOOD Output Level, HIGH (+Vs) > 2.5 V,  0 mA < ISGOOD< 1 mA  2 3 V
RSGOOD SGOOD pull down impedance 0 µA < ISGOOD < 200 µA  6.3
MODE
I(MODE) MODE Source Current 1.55 2 2.4 µA
RMODE Mode Selection Resistor 180
THERMAL SHUTDOWN
T(TSD) Thermal Shutdown (TSD) threshold, Rising 160 °C
T(TSDHyst) Thermal Shutdown (TSD) Hysterises 11 °C
HART
BW Input small signal bandwidth –25 mA < IIN < 25 mA, ΔIIN = 1 mApp at 1 kΩ 10 kHz