SLVSHR0 May   2025 TPS2HCS08-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1. 5.1 A Version Package
    2. 5.2 Pinout - Version A
    3. 5.3 Version B Package
    4. 5.4 Pinout - Version B
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
      1. 8.3.1 State Diagram
      2. 8.3.2 Output Control
      3. 8.3.3 SPI Mode Operation
      4. 8.3.4 Fault Reporting
      5. 8.3.5 SLEEP
      6. 8.3.6 CONFIG/ACTIVE
      7. 8.3.7 LIMP_HOME State (Version A only)
      8. 8.3.8 Battery Supply Input (VBB) Under-voltage
      9. 8.3.9 LOW POWER MODE (LPM) States
        1. 8.3.9.1 MANUAL_LPM State
        2. 8.3.9.2 AUTO_LPM State
    4. 8.4 Feature Description
      1. 8.4.1 Protection Mechanisms
        1. 8.4.1.1 Overcurrent Protection
          1. 8.4.1.1.1 Inrush Period - Overcurrent Protection
          2. 8.4.1.1.2 Overcurrent Protection - Steady State Operation
          3. 8.4.1.1.3 Programmable Fuse Protection
          4. 8.4.1.1.4 Immediate Shutdown Overcurrent Protection (IOCP)
          5. 8.4.1.1.5 Auto Retry and Latch-off Behavior
        2. 8.4.1.2 Thermal Shutdown
        3. 8.4.1.3 Reverse Battery
      2. 8.4.2 Diagnostic Mechanisms
        1. 8.4.2.1 Integrated ADC
        2. 8.4.2.2 Digital Current Sense Output
        3. 8.4.2.3 Output Voltage Measurement
        4. 8.4.2.4 MOSFET Temperature Measurement
        5. 8.4.2.5 Drain-to-Source Voltage (VDS) Measurement
        6. 8.4.2.6 VBB Voltage Measurement
        7. 8.4.2.7 VOUT Short-to-Battery and Open-Load
          1. 8.4.2.7.1 Measurement With Channel Output (FET) Enabled
          2. 8.4.2.7.2 Detection With Channel Output Disabled
    5. 8.5 Parallel Mode Operation
    6. 8.6 TPS2HCS08 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Thermal Considerations
        2. 9.2.2.2 Configuring the Capacitive Charging Mode
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.2.2 Digital Current Sense Output

The integrated current sense circuit of the device provide a sense current (ISNS) proportional to the load current (IOUTx) of each channel through the SNS pin to an external sense resister (RSNS) to create a voltage. The current sense of each channel is multiplexed internally and is outputted on the SNS pin by the ADC scheduler. The voltage created by the ISNS and RSNS is then sampled by the internal 10-bit ADC where the result of the ADC conversion is stored in ADC_RESULT_CHx_I for each channel. The ISNS_RDY_CHx bit is set to 1 if a new ADC conversion result exists since the register was last read.

To ensure an accurate sensing measurement by the internal ADC, the sensing resistor should be connected to the IC GND.

The device offers two current sense ratios (KSNS1) and (KSNS2) for each channel which can be set through the OL_ON_EN_CHx bit in the CHx_CONFIG registers. The higher KSNS1 ratio (OL_ON_EN_CHx = 0 mode) allows for the channel to accurately measure high output current levels where the lower KSNS2 ratio (OL_ON_EN_CHx = 1 mode) enables the channel to accurately measure low output current levels. The KSNS1 utilizes the full mosfet where KSNS2 utilizes a small mosfet with ON resistance, RON_OL, to provide the lower current sense ratio. To use the KSNS2 ratio, the output current level must be below IENTRY_OL_ON before the OL_ON_EN_CHx bit is set to 1. If the current is not below IENTRY_OL_ON, the KSNS2 operation will not be entered and the KSNS1 operation will still be active. If the channel is operating with KSNS2 and the output current increases above IEXIT_OL_ON, the device will automatically transition out of KSNS2 to KSNS1 where the OL_ON_EN_CHx bit will be reset to 0 and the full mosfet is active. If the current falls below IENTRY_OL_ON again then the OL_ON_EN_CHx bit needs to be set back to 1 to transition to KSNS2 operation again. The system can manually exit KSNS2 operation by writing OL_ON_EN_CHx = 0. When measuring the output current through the integrated ADC in KSNS2 operation, the system should continue to monitor the OL_ON_EN_CHx = 1 bit to ensure the device is still in KSNS2 operation when the output current measurement is read.

The device also offers a voltage scaling option to amplify the current sense voltage at the ADC input. At low output current levels this helps to allow the current sense voltage to be at higher levels of the integrated ADC. The voltage scaling is set through the ISNS_SCALE_CHx bit. Table 8-11 below provides the different settings for the ISNS_SCALE_CHx. ISNS_SCALE_CHx = 1 operation is recommended only in OL_ON_EN_CHx = 1 mode.

It is recommended to only use OL_ON_EN_CHx = 1 mode and/or ISNS_SCALE_CHx = 1 with I2T disabled (I2T_EN = 0). If OL_ON_EN_CHx = 1 and/or ISNS_SCALE_CHx = 1 is used with I2T enabled (I2T_EN = 1) this could cause the channel to turn off at unintended lower I2T thresholds.

Table 8-11 ISNS_SCALE_CHx Settings
ISNS_SCALE_CHx Value
0 x1
1 x8

The ISNS_SCALE_EFF_CHx bit in the ADC_RESULT_CHx_I register, will provide an indication if the channel is operating with 1x or 8x voltage scaling so the system knows which voltage scaling factor to apply when converting the current sense measurement.

The ADC conversion equation for current sense for different OL_ON_EN_CHx settings are below:

with OL_ON_EN_CHx = 0,

Equation 8. IOUT (A)= KSNS1 × VADCREFHI1023 × RSNS× ADC_RESULT_CHx_I

with OL_ON_EN_CHx = 1,

Equation 9. IOUT (A)= KSNS2 × VADCREFHI1023 × RSNS × ISNS_SCALE_CHx× ADC_RESULT_CHx_I

The current sense function is enabled for each channel by default. The current sense function can be enabled or disabled globally through the ADC_ISNS_DIS bit in the ADC_CONFIG register. When the global ADC_ISNS_DIS bit is 0 the device will enable or disable the current sense function on each channel according to the ISNS_DIS_CHx bit in the respective CHx_CONFIG registers.

If I2T protection is used, the current sense function has to be enabled before the I2T protection can be used. The current sense function is only available when the channel is enabled and in the steady state operation. The current sense function is not available in the inrush period.