SLVSHR0
May 2025
TPS2HCS08-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
5.1
A Version Package
5.2
Pinout - Version A
5.3
Version B Package
5.4
Pinout - Version B
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
SPI Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Device Functional Modes
8.3.1
State Diagram
8.3.2
Output Control
8.3.3
SPI Mode Operation
8.3.4
Fault Reporting
8.3.5
SLEEP
8.3.6
CONFIG/ACTIVE
8.3.7
LIMP_HOME State (Version A only)
8.3.8
Battery Supply Input (VBB) Under-voltage
8.3.9
LOW POWER MODE (LPM) States
8.3.9.1
MANUAL_LPM State
8.3.9.2
AUTO_LPM State
8.4
Feature Description
8.4.1
Protection Mechanisms
8.4.1.1
Overcurrent Protection
8.4.1.1.1
Inrush Period - Overcurrent Protection
8.4.1.1.2
Overcurrent Protection - Steady State Operation
8.4.1.1.3
Programmable Fuse Protection
8.4.1.1.4
Immediate Shutdown Overcurrent Protection (IOCP)
8.4.1.1.5
Auto Retry and Latch-off Behavior
8.4.1.2
Thermal Shutdown
8.4.1.3
Reverse Battery
8.4.2
Diagnostic Mechanisms
8.4.2.1
Integrated ADC
8.4.2.2
Digital Current Sense Output
8.4.2.3
Output Voltage Measurement
8.4.2.4
MOSFET Temperature Measurement
8.4.2.5
Drain-to-Source Voltage (VDS) Measurement
8.4.2.6
VBB Voltage Measurement
8.4.2.7
VOUT Short-to-Battery and Open-Load
8.4.2.7.1
Measurement With Channel Output (FET) Enabled
8.4.2.7.2
Detection With Channel Output Disabled
8.5
Parallel Mode Operation
8.6
TPS2HCS08 Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Thermal Considerations
9.2.2.2
Configuring the Capacitive Charging Mode
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PWP|16
MPDS371C
Thermal pad, mechanical data (Package|Pins)
PWP|16
PPTD391
Orderable Information
slvshr0_oa
1
Features
AEC-Q100 qualified for automotive applications
Temperature grade 1: –40°C to 125°C
Device HBM ESD classification level 2
Device CDM ESD classification level C5
Withstands 36V load dump
Dual-channel SPI controlled smart high-side switch with integrated nFETs.
Integrated wire-harness protection without MCU involvement and a SPI programmable fuse curve
Protection against persistent overload condition
Improve system level reliability through SPI programmable
adjustable overcurrent protection
SPI configurable capacitive charging mode to drive a wide range of capacitive input ECUs load current needs.
Low quiescent current, low power ON-state to supply always-ON loads with automatic wake on load current increase with wake signal to MCU
Robust integrated output protection:
Integrated thermal protection
Protection against short-to-ground
Protection against
reverse battery
events including automatic switch on of FET with reverse supply voltage
Automatic shut off on loss of battery and ground
Integrated output clamp to demagnetize inductive loads
Digital sense output via SPI can be configured to measure:
Load current accurately with integrated ADC
Output or supply voltage, FET temperature
Provides full fault diagnostics through SPI interface and indication through FLT pin
Detection of open load and short-to-battery