SLUS658D July   2005  – June 2019 TPS40190

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Dissipation Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internally Fixed Parameters
      2. 7.3.2 Output Short Circuit Protection
      3. 7.3.3 Enable Functionality
      4. 7.3.4 5-V Regulator
      5. 7.3.5 Startup Sequence and Timing
      6. 7.3.6 Prebias Outputs
  8. 8 Application and Implementation
    1. 8.1 Typical Applications
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Community Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.6 Prebias Outputs

Some applications require that the converter not sink current during start-up if a pre-existing voltage is higher than the output. Because synchronous buck converters inherently sink current some method of overcoming this characteristic must be employed. Applications that require this operation are typically power rails for a multi supply processor or ASIC. The method used in this controller, is to not allow the low side or rectifier FET to turn on until there the output voltage commanded by the start up ramp is higher than the pre-existing output voltage. This is detected by monitoring the internal pulse width modulator (PWM) for its first output pulse. Because this controller uses a closed loop startup, the first output pulse from the PWM does not occur until the output voltage is commanded to be higher than the pre-existing voltage. This effectively limits the controller to sourcing current only during the startup sequence.

If the pre-existing voltage is higher than the intended regulation point for the output of the converter, the converter starts and sinks current when the soft-start time has completed. A typical pre-biased start-up is shown in Figure 28.

TPS40190 startup_lus658.gifFigure 27. TPS40190 Start-up Timing
TPS40190 prebias_lus658.gifFigure 28. Prebiased Start-up Timing