SLVSD45 December   2015 TPS50601-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 8.3.2  PVIN vs Frequency
      3. 8.3.3  Voltage Reference
      4. 8.3.4  Adjusting the Output Voltage
      5. 8.3.5  Maximum Duty Cycle Limit
      6. 8.3.6  PVIN vs Frequency
      7. 8.3.7  Safe Start-Up into Prebiased Outputs
      8. 8.3.8  Error Amplifier
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Enable and Adjust UVLO
      11. 8.3.11 Adjustable Switching Frequency and Synchronization (SYNC)
      12. 8.3.12 Slow Start (SS/TR)
      13. 8.3.13 Power Good (PWRGD)
      14. 8.3.14 Bootstrap Voltage (BOOT) and Low Dropout Operation
      15. 8.3.15 Sequencing (SS/TR)
      16. 8.3.16 Output Overvoltage Protection (OVP)
      17. 8.3.17 Overcurrent Protection
        1. 8.3.17.1 High-Side MOSFET Overcurrent Protection
        2. 8.3.17.2 Low-Side MOSFET Overcurrent Protection
      18. 8.3.18 TPS50601-SP Thermal Shutdown
      19. 8.3.19 Turn-On Behavior
      20. 8.3.20 Small Signal Model for Loop Response
      21. 8.3.21 Simple Small Signal Model for Peak Current Mode Control
      22. 8.3.22 Small Signal Model for Frequency Compensation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Fixed-Frequency PWM Control
      2. 8.4.2 Continuous Current Mode (CCM) Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Operating Frequency
        2. 9.2.2.2 Output Inductor Selection
        3. 9.2.2.3 Output Capacitor Selection
        4. 9.2.2.4 Input Capacitor Selection
        5. 9.2.2.5 Slow Start Capacitor Selection
        6. 9.2.2.6 Bootstrap Capacitor Selection
        7. 9.2.2.7 Undervoltage Lockout (UVLO) Set Point
        8. 9.2.2.8 Output Voltage Feedback Resistor Selection
          1. 9.2.2.8.1 Minimum Output Voltage
        9. 9.2.2.9 Compensation Component Selection
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Device Nomenclature

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 5962R10221:
    • Radiation Hardness Assurance (RHA) up to TID 100 krad (Si)
    • ELDRS Free 100 krad (Si) – 10 mRAD(Si)/s
    • Single Event Latchup (SEL) Immune to
      LET = 85 MeV-cm2/mg (See Radiation Report)
    • SEB and SEGR Immune to 85 MeV-cm2/mg, SOA Curve Available (See Radiation Report)
    • SET/SEFI Cross-Section Plot Available (See Radiation Report)
  • Peak Efficiency: 95% (VO = 3.3 V)
  • Integrated 55-mΩ/50-mΩ MOSFETs
  • Split Power Rail: 1.6 to 6.3 V on PVIN
  • Power Rail: 3 to 6.3 V on VIN
  • 6-A Maximum Output Current
  • Flexible Switching Frequency Options:
    • 100-kHz to 1-MHz Adjustable Internal Oscillator
    • External Sync Capability: 100 kHz to 1 MHz
    • Sync Pin can be Configured as a 500-kHz Output for Master/Slave Applications
  • 0.795-V ±1.258% Voltage Reference at 25°C
  • Monotonic Start-Up into Prebiased Outputs
  • Adjustable Soft Start Through External Capacitor
  • Input Enable and Power-Good Output for Power Sequencing
  • Power Good Output Monitor for Undervoltage and Overvoltage
  • Adjustable Input Undervoltage Lockout (UVLO)
  • 20-Pin Thermally-Enhanced Ceramic Flatpack Package (HKH)
  • See www.ti.com/swift for SWIFT™ Documentation
  • See the Tools & Software Tab

    • Efficiency vs Load Current, Vin = 5 V

    TPS50601-SP eff_vs_load_lvsa94.gif

2 Applications

  • Space Satellite Point of Load Supply for FPGAs, Microcontrollers, and ASICs
  • Space Satellite Payloads
  • Radiation-Tolerant Applications
  • Available in Military (–55°C to 125°C) Temperature Range
  • Engineering Evaluation (/EM) Samples are Available(1)

3 Description

The TPS50601-SP is a radiation hardened, 6.3-V, 6-A synchronous step-down converter, which is optimized for small designs through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which reduces component count, and a high switching frequency, reducing the inductor's footprint. The devices are offered in a thermally enhanced 20-pin ceramic, dual in-line flatpack package.

Device Information(2)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS50601-SP CFP (20) 7.38 × 12.70 mm
KGD(3) N/A(4)
  1. These units are intended for engineering evaluation only. They are processed to a non-compliant flow (that is no burn-in, and so forth) and are tested to temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing or flight use. Parts are not warranted for performance on full MIL specified temperature range of –55°C to 125°C or operating life.
  2. For all available packages, see the orderable addendum at the end of the data sheet.
  3. Known good die
  4. Bare die in waffle pack

SPACE

SPACE

4 Revision History

DATE REVISION NOTES
December 2015 *

    Initial release.

  • Created separate data sheet for this part number
  • Removed the ψJT thermal metric