SLUSCA7A November 2015 – July 2022 TPS51216-EP
PRODUCTION DATA
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (continued)
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
- RUK|20
Thermal pad, mechanical data (Package|Pins)
- RUK|20
Orderable Information
7.5 Electrical Characteristics
TJ = –55°C to 125°C, VV5IN = 5 V, VLDOIN is connected to VDDQ output, VMODE = 0 V, VS3 = VS5 = 5 V (unless otherwise noted)
| PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY CURRENT | ||||||
| IV5IN(S0) | V5IN supply current, in S0 | TJ = 25°C, No load, VS3 = VS5 = 5 V | 590 | μA | ||
| IV5IN(S3) | V5IN supply current, in S3 | TJ = 25°C, No load, VS3 = 0 V, VS5 = 5 V | 500 | μA | ||
| IV5INSDN | V5IN shutdown current | TJ = 25°C, No load, VS3 = VS5 = 0 V | 1 | μA | ||
| IVLDOIN(S0) | VLDOIN supply current, in S0 | TJ = 25°C, No load, VS3 = VS5 = 5 V | 5 | μA | ||
| IVLDOIN(S3) | VLDOIN supply current, in S3 | TJ = 25°C, No load, VS3 = 0 V, VS5 = 5 V | 5 | μA | ||
| IVLDOINSDN | VLDOIN shutdown current | TJ = 25°C, No load, VS3 = VS5 = 0 V | 5 | μA | ||
| VREF OUTPUT | ||||||
| VVREF | Output voltage | IVREF = 30 μA, TJ = 25°C | 1.8000 | V | ||
| 0 μA ≤ IVREF <300 μA, TJ = –55°C to 125°C | 1.7820 | 1.8180 | ||||
| IVREFOCL | Current limit | VVREF = 1.7 V | 0.4 | 0.8 | mA | |
| VTTREF OUTPUT | ||||||
| VVTTREF | Output voltage | VVDDQSNS/2 | V | |||
| VVTTREF | Output voltage tolerance to VVDDQ | |IVTTREF| <100 μA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V | 49.2% | 50.8% | ||
| |IVTTREF| <10 mA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V | 49% | 51% | ||||
| IVTTREFOCLSRC | Source current limit | VVDDQSNS = 1.8 V, VVTTREF= 0 V | 10 | 18 | mA | |
| IVTTREFOCLSNK | Sink current limit | VVDDQSNS = 1.8 V, VVTTREF = 1.8 V | 10 | 17 | mA | |
| IVTTREFDIS | VTTREF discharge current | TJ = 25°C, VS3 = VS5 = 0 V, VVTTREF = 0.5 V | 0.8 | 1.3 | mA | |
| VTT OUTPUT | ||||||
| VVTT | Output voltage | VVTTREF | V | |||
| VVTTTOL | Output voltage tolerance to VTTREF | |IVTT| ≤ 10 mA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V, IVTTREF = 0 A | –20 | 20 | mV | |
| |IVTT| ≤ 1 A, 1.2 ≤ VVDDQSNS ≤ 1.8 V, IVTTREF = 0 A | –30 | 30 | ||||
| |IVTT| ≤ 2 A, 1.4 V ≤ VVDDQSNS ≤ 1.8 V, IVTTREF = 0 A | –40 | 40 | ||||
| |IVTT| ≤ 1.5 A, 1.2 V ≤ VVDDQSNS ≤ 1.4 V, IVTTREF = 0 A | –40 | 40 | ||||
| IVTTOCLSRC | Source current limit | VVDDQSNS = 1.8 V, VVTT = VVTTSNS = 0.7 V, IVTTREF = 0 A | 2 | 3 | A | |
| IVTTOCLSNK | Sink current limit | VVDDQSNS = 1.8V, VVTT = VVTTSNS = 1.1 V, IVTTREF = 0 A | 2 | 3 | ||
| IVTTLK | Leakage current | TJ = 25°C , VS3 = 0 V, VS5 = 5 V, VVTT = VVTTREF | 5 | μA | ||
| IVTTSNSBIAS | VTTSNS input bias current | VS3 = 5 V, VS5 = 5 V, VVTTSNS = VVTTREF | –0.5 | 0.0 | 0.5 | |
| IVTTSNSLK | VTTSNS leakage current | VS3 = 0 V, VS5 = 5 V, VVTTSNS = VVTTREF | –1 | 0 | 1 | |
| IVTTDIS | VTT Discharge current | TJ = 25°C, VS3 = VS5 = 0 V, VVDDQSNS = 1.8 V, VVTT = 0.5 V, IVTTREF = 0 A | 7.8 | mA | ||
| VDDQ OUTPUT | ||||||
| VVDDQSNS | VDDQ sense voltage | VREFIN | ||||
| VVDDQSNSTOL | VDDQSNS regulation voltage tolerance to REFIN | TJ = 25°C | –3 | 3 | mV | |
| IVDDQSNS | VDDQSNS input current | VVDDQSNS = 1.8 V | 39 | μA | ||
| IREFIN | REFIN input current | VREFIN = 1.8 V | –0.1 | 0.0 | 0.1 | μA |
| IVDDQDIS | VDDQ discharge current | VS3 = VS5 = 0 V, VVDDQSNS = 0.5 V, MODE pin pulled down to GND through 47 kΩ (Non-tracking) | 12 | mA | ||
| IVLDOINDIS | VLDOIN discharge current | VS3 = VS5 = 0 V, VVDDQSNS = 0.5 V, MODE pin pulled down to GND through 100 kΩ (Non-tracking) | 1.2 | A | ||
| SWITCH MODE POWER SUPPLY (SMPS) FREQUENCY | ||||||
| ƒSW | VDDQ switching frequency | VIN = 5 V, VVDDQSNS = 1.8 V, RMODE = 100 kΩ | 300 | kHz | ||
| VIN = 5 V, VVDDQSNS = 1.8 V, RMODE = 200 kΩ | 400 | |||||
| tON(min) | Minimum on time | DRVH rising to falling1 | 60 | ns | ||
| tOFF(min) | Minimum off time | DRVH falling to rising | 200 | 320 | 450 | |
| VDDQ MOSFET DRIVER | ||||||
| RDRVH | DRVH resistance | Source, IDRVH = –50 mA | 1.6 | 3.0 | Ω | |
| Sink, IDRVH = 50 mA | 0.6 | 1.5 | ||||
| RDRVL | DRVL resistance | Source, IDRVL = –50 mA | 0.9 | 2.0 | ||
| Sink, IDRVL = 50 mA | 0.5 | 1.2 | ||||
| tDEAD | Dead time | DRVH-off to DRVL-on | 10 | ns | ||
| DRVL-off to DRVH-on | 20 | |||||
| INTERNAL BOOT STRAP SW | ||||||
| VFBST | Forward voltage | VV5IN-VBST, TJ = 25°C, IF = 10 mA | 0.1 | 0.2 | V | |
| IVBSTLK | VBST leakage current | TJ = 25°C, VVBST = 33 V, VSW = 28 V | 0.01 | 1.5 | μA | |
| LOGIC THRESHOLD | ||||||
| IMODE | MODE source current | 14 | 15 | 16 | μA | |
| VTHMODE | MODE threshold voltage | MODE 0 | 580 | 600 | 620 | mV |
| MODE 1 | 829 | 854 | 879 | |||
| MODE 2 | 1202 | 1232 | 1262 | |||
| MODE 3 | 1760 | 1800 | 1840 | |||
| VIL | S3/S5 low-level voltage | 0.5 | V | |||
| VIH | S3/S5 high-level voltage | 1.8 | ||||
| VIHYST | S3/S5 hysteresis voltage | 0.25 | ||||
| VILK | S3/S5 input leak current | –1 | 0 | 1 | μA | |
| SOFT START | ||||||
| tSS | VDDQ soft-start time | Internal soft-start time, CVREF = 0.1 μF, S5 rising to VVDDQSNS > 0.99 × VREFIN | 1.1 | ms | ||
| PGOOD COMPARATOR | ||||||
| VTHPG | VDDQ PGOOD threshold | PGOOD in from higher | 106% | 108% | 110% | |
| PGOOD in from lower | 90% | 92% | 94% | |||
| PGOOD out to higher | 114% | 116% | 118% | |||
| PGOOD out to lower | 82% | 84% | 86% | |||
| IPG | PGOOD sink current | VPGOOD = 0.5 V | 3 | 5.9 | mA | |
| tPGDLY | PGOOD delay time | Delay for PGOOD in | 0.8 | 1 | 1.2 | ms |
| Delay for PGOOD out, with 100 mV over drive | 330 | ns | ||||
| tPGSSDLY | PGOOD start-up delay | CVREF = 0.1 μF, S5 rising to PGOOD rising | 2.5 | ms | ||
| PROTECTIONS | ||||||
| ITRIP | TRIP source current | TJ = 25°C, VTRIP = 0.4 V | 9 | 10 | 11 | μA |
| TCITRIP | TRIP source current temperature coefficient1 | 4700 | ppm/°C | |||
| VTRIP | VTRIP voltage range | 0.2 | 3 | V | ||
| VOCL | Current limit threshold | VTRIP = 3.0 V | 360 | 375 | 390 | mV |
| VTRIP = 1.6 V | 190 | 200 | 210 | |||
| VTRIP = 0.2 V | 20 | 25 | 30 | |||
| VOCLN | Negative current limit threshold | VTRIP = 3.0 V | –390 | –375 | –360 | mV |
| VTRIP = 1.6 V | –210 | –200 | –190 | |||
| VTRIP = 0.2 V | –30 | –25 | –20 | |||
| VZC | Zero cross detection offset | 0 | mV | |||
| VUVLO | V5IN UVLO threshold voltage | Wake-up | 4.2 | 4.4 | 4.5 | V |
| Shutdown | 3.7 | 3.9 | 4.1 | |||
| VOVP | VDDQ OVP threshold voltage | OVP detect voltage | 118% | 120% | 122% | |
| tOVPDLY | VDDQ OVP propagation delay | With 100 mV over drive | 430 | ns | ||
| VUVP | VDDQ UVP threshold voltage | UVP detect voltage | 66% | 68% | 70% | |
| tUVPDLY | VDDQ UVP delay | 1 | ms | |||
| tUVPENDLY | VDDQ UVP enable delay | 1.2 | ms | |||
| VOOB | OOB threshold voltage | 108% | ||||
| THERMAL SHUTDOWN | ||||||
| TSDN | Thermal shutdown threshold | Shutdown temperature1 | 140 | °C | ||
| Hysteresis1 | 10 | |||||
- Ensured by design. Not production tested.
A. See data sheet for absolute maximum and minimum recommended operating conditions.
B. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life).
C. Enhanced plastic product disclaimer applies.
Figure 7-1 TPS51216-EP Derating Chart