SLVSAV1D May   2011  – July 2016 TPS54062

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency PWM Control
      2. 7.3.2  Slope Compensation Output Current
      3. 7.3.3  Error Amplifier
      4. 7.3.4  Voltage Reference
      5. 7.3.5  Adjusting the Output Voltage
      6. 7.3.6  Enable and Adjusting Undervoltage Lockout
      7. 7.3.7  Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      8. 7.3.8  Selecting the Switching Frequency
      9. 7.3.9  How to Interface to RT/CLK Pin
      10. 7.3.10 Overvoltage Transient Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation Near Minimum Input Voltage
      2. 7.4.2 Operation With Enable Control
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Continuous Conduction Mode (CCM) Switching Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Selecting the Switching Frequency
          2. 8.2.1.2.2 Output Inductor Selection (LO)
          3. 8.2.1.2.3 Output Capacitor
          4. 8.2.1.2.4 Input capacitor
          5. 8.2.1.2.5 Bootstrap Capacitor Selection
          6. 8.2.1.2.6 Under Voltage Lock Out Set Point
          7. 8.2.1.2.7 Output Voltage and Feedback Resistors Selection
          8. 8.2.1.2.8 Closing the Loop
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DCM Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Closing the Feedback Loop
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from C Revision (December 2014) to D Revision

  • Added text to the Layout Guidelines section " All sensitive analog traces and components..."Go

Changes from B Revision (August 2012) to C Revision

  • Added Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go

Changes from A Revision (October 2011) to B Revision

  • Added features Item: Diode Emulation for Improved Light-Load EfficiencyGo
  • Changed Features Item From: 100 kHz to 400 kHz Switching Frequency To: 100 kHz to 400 kHz Adjustable Switching FrequencyGo
  • Changed the Efficiency GraphGo
  • Changed VSON-8 package graphic to clarify ThermalPAD areaGo
  • Changed the EN pin MAX value From: 5 V To: 8 VGo
  • Changed the Enable and Adjusting Undervoltage Lockout sectionGo
  • Changed Equation 22 through Equation 25Go

Changes from * Revision (May 2011) to A Revision

  • Changed Features Item From: MSOP8 and WSON8 Packages To: MSOP-8 and 3 mm x 3 mm VSON-8 PackagesGo
  • Changed the Efficiency GraphGo
  • Added the VSON (DRB-8 Pin) PackageGo
  • Changed the RT/CLK pin DescriptionGo
  • Added VSON-8 Pins values to the Thermal Information tableGo
  • Changed the PLL lock in time Unit of Measure From: µA To: µsGo
  • Changed Equation 22Go
  • Changed the Efficiency vs Output Current Graphs, Figure 21 and Figure 22Go