SLUSCD4B March 2017 – May 2018 TPS543C20
The TPS543C20 has power-good output that indicates logic high when output voltage is within the target. The power-good function is activated after soft-start has finished. When the soft-start ramp reaches 90% of setpoint, PGOOD detection function will be enabled. If the output voltage becomes within ±8% of the target value, internal comparators detect power-good state and the power good signal becomes high after a delay. If the output voltage goes outside of ±12% of the target value, the power good signal becomes low after an internal delay. The power-good output is an open-drain output and must be pulled up externally.
This part has internal pull up for EN. EN is internally pulled up to BP when EN pin is floating. EN can be pulled low through external grounding. When EN pin voltage is below its threshold, TPS543C20 enters into shutdown operation, and the minimum time for toggle EN to reset is 5 µs.