SLVS538B NOVEMBER   2004  – December 2014 TPS61060 , TPS61061 , TPS61062

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Start-Up
      2. 8.3.2 Short-Circuit Protection
      3. 8.3.3 Overvoltage Protection (OVP)
      4. 8.3.4 Efficiency and Feedback Voltage
      5. 8.3.5 Undervoltage Lockout
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable PWM Dimming
      2. 8.4.2 Digital Brightness Control (ILED)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Efficiency
        3. 9.2.2.3 Output Capacitor Selection
        4. 9.2.2.4 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Chipscale Package Dimensions

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YZF|8
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. The input capacitor should be placed as close as possible to the input pin for good input voltage filtering. The inductor should be placed as close as possible to the switch pin to minimize the noise coupling into other circuits. The output capacitor needs to be placed directly from the OUT pin to GND rather than across the LEDs. This reduces the ripple current in the trace to the LEDs. The GND pin must be connected directly to the PGND pin. When doing the PCB layout, the bold traces (Figure 22) should be routed first, as well as placement of the inductor, and input and output capacitors.

11.2 Layout Example

layoutex_slvs538.gifFigure 22. TPS6106x Layout Example

11.3 Thermal Considerations

The TPS6106x comes in a thermally enhanced QFN package. The package includes a thermal pad that improves the thermal capabilities of the package. Also see QFN/SON PCB Attachment application report (SLUA271). The thermal resistance junction-to-ambient RθJA of the QFN package greatly depends on the PCB layout. Using thermal vias and wide PCB traces improves the thermal resistance RθJA. The thermal pad must be soldered to the analog ground on the PCB.

For the NanoFree package, similar guidelines apply for the QFN package. The thermal resistance RθJA depends mainly on the PCB layout.