SLVSB64I November 2011 – March 2018 TPS65217
The LDO1 and LDO2 regulators support up to 100 mA each, are internally current limited, and have a maximum dropout voltage of 200 mV at the rated output current. In SLEEP mode, however, the output current is limited to 1 mA each. When disabled, both outputs are discharged to ground through a 430-Ω resistor.
The LDO1 regulator supports an output voltage range from 1 V to 1.8 V, which is controlled through the DEFLDO1 register. The LDO2 regulator supports an output voltage range from 0.9 V to 1.5 V, and is controlled through the DEFLDO2 register. By default, the LDO1 regulator is enabled immediately after a power-up event as described in the PMIC States section and stays on in the SLEEP state to support system standby. Each LDO regulator has low standby current of less than 15 µA (typical).
The LDO2 regulator can be configured to track the output voltage of the DCDC3 converter (core voltage). When the TRACK bit is set to 1b in the DEFLDO2 register, the output is determined by the DCDC3[5:0] bits of the DEFDCDC3 register and the LDO2[5:0] bits of the DEFLDO2 register are ignored.
The LDO1 and LDO2 regulators can be controlled through STROBE 1 through 6, special STROBES 14 and 15, or through the corresponding enable bits in the ENABLE register. By default, the LDO1 regulator is controlled by STROBE 15, which keeps LDO1 on in the SLEEP state. The STROBE assignments can be changed by the user while the device is in the ACTIVE state, but all register settings are reset to the default values when the device goes to the SLEEP or OFF state. TI does not recommend real-time modification of the STROBE assignments of the LDO1 or LDO2 regulator. For permanent changes to the default STROBE assignments, custom programming during production at the TI factory is required.