SLVSDQ0K September   2017  – September 2025 TPS7B82-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: Grade 1 Options
    6. 5.6 Electrical Characteristics: Grade 0 Options
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Enable (EN)
      2. 6.3.2 Undervoltage Shutdown
      3. 6.3.3 Current Limit
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Operation With VIN Lower Than 3 V
      2. 6.4.2 Operation With VIN Larger Than 3 V
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Capacitor
        2. 7.2.2.2 Output Capacitor
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Electrical Characteristics: Grade 0 Options

VIN = 14-V, 10-µF ceramic output capacitor, grade 0 options (PWP package), TJ = –40°C to +165°C, over operating ambient temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE AND CURRENT (IN)
VIN Input voltage VOUT(NOM) + V(Dropout) 40 V
I(SD) Shutdown current EN = 0 V 0.3 1 µA
I(Q) Quiescent current VIN = 6 V to 40 V, EN ≥ 2 V,
IOUT = 0 mA		 1.9 5
VIN = 6 V to 40 V, EN ≥ 2 V,
IOUT = 0.2 mA		 2.7 6.5 µA
V(IN, UVLO) VIN undervoltage detection Ramp VIN down until the output turns OFF 2.7 V
Hysteresis 200 mV
ENABLE INPUT (EN)
VIL Logic-input low level 0.7 V
VIH Logic-input high level 2 V
REGULATED OUTPUT (OUT)
VOUT Regulated output VIN = VOUT + V(Dropout) to 14 V,
IOUT = 1 mA to 300 mA		 –1.5% 1.5%
V(Line-Reg) Line regulation VIN = 6 V to 40 V, IOUT = 10 mA 10 mV
V(Load-Reg) Load regulation VIN = 14 V, IOUT = 1 mA to 300 mA 20 mV
V(Dropout) Dropout voltage(1) VOUT(NOM) = 5 V IOUT = 300 mA 630 1170 mV
IOUT = 200 mA 420 780
IOUT = 100 mA 210 390
VOUT = 3.3 V IOUT = 300 mA 730 1350
IOUT = 200 mA 475 900
IOUT = 100 mA 450
IOUT Output current VOUT in regulation 0 300 mA
I(CL) Output current limit VOUT short to 90% × VOUT 310 510 690 mA
PSRR Power-supply ripple rejection V(Ripple) = 0.5 VPP, IOUT = 10 mA, frequency = 100 Hz, COUT = 2.2 µF 60 dB
OPERATING TEMPERATURE RANGE
T(SD) Junction shutdown temperature 185 °C
T(HYST) Hysteresis of thermal shutdown 20 °C
(1) Dropout is not valid for the 2.5-V output because of the minimum input voltage limits.