SLOSEF4 August   2025 TRF1208-EP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Fully-Differential Amplifier
      2. 6.3.2 Single Supply Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power Down Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving a High-Speed ADC
      2. 7.1.2 Calculating Output Voltage Swing
      3. 7.1.3 Thermal Considerations
    2. 7.2 Typical Applications
      1. 7.2.1 TRF1208-EP in Receive Chain
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RPV|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Typical Characteristics

at TA = 25°C, temperature curves specify ambient temperature, VDD = 3.3V, 50Ω single-ended input, and 100Ω differential output (unless otherwise noted)

TRF1208-EP Power Gain Across Temperature
 
Figure 5-1 Power Gain Across Temperature
TRF1208-EP Return Loss Across Temperature
 
Figure 5-3 Return Loss Across Temperature
TRF1208-EP Reverse Isolation Across Temperature
 
Figure 5-5 Reverse Isolation Across Temperature
TRF1208-EP OIP3 Across Temperature
PO/tone = –4dBm, 10MHz tone spacing
Figure 5-7 OIP3 Across Temperature
TRF1208-EP IMD3 Lower Across Temperature
At (2f1 – f2) frequency, f1 < f2; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-9 IMD3 Lower Across Temperature
TRF1208-EP IMD3 Higher Across Temperature
At (2f2 – f1) frequency, f1 < f2; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-11 IMD3 Higher Across Temperature
TRF1208-EP OIP2 Lower Across Temperature
At (f2 – f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-13 OIP2 Lower Across Temperature
TRF1208-EP OIP2 Higher Across Temperature
At (f2 + f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-15 OIP2 Higher Across Temperature
TRF1208-EP IMD2 Lower Across Temperature
At (f2 – f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-17 IMD2 Lower Across Temperature
TRF1208-EP IMD2 Higher Across Temperature
At (f2 + f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-19 IMD2 Higher Across Temperature
TRF1208-EP HD2 Across Temperature
PO = +3dBm
Figure 5-21 HD2 Across Temperature
TRF1208-EP HD3 Across Temperature
PO = +3dBm
Figure 5-23 HD3 Across Temperature
TRF1208-EP HD2 vs Output Power
 
Figure 5-25 HD2 vs Output Power
TRF1208-EP Output P1dB Across Temperature
 
Figure 5-27 Output P1dB Across Temperature
TRF1208-EP NF Across Temperature
 
Figure 5-29 NF Across Temperature
TRF1208-EP Gain Imbalance
 
Figure 5-31 Gain Imbalance
TRF1208-EP CMRR Across Temperature
 
Figure 5-33 CMRR Across Temperature
TRF1208-EP Overdrive Recovery
Input = –2dBm, f = 500MHz
Figure 5-35 Overdrive Recovery
TRF1208-EP Low Frequency Gain Response
Low-frequency cutoff as a function of ac-coupling capacitor
Figure 5-37 Low Frequency Gain Response
TRF1208-EP Single-Ended S11
Figure 5-39 Single-Ended S11
TRF1208-EP Power Gain Across VDD
 
Figure 5-2 Power Gain Across VDD
TRF1208-EP Return Loss Across VDD
 
Figure 5-4 Return Loss Across VDD
TRF1208-EP Reverse Isolation Across VDD
 
Figure 5-6 Reverse Isolation Across VDD
TRF1208-EP OIP3 Across VDD
PO/tone = –4dBm, 10MHz tone spacing
Figure 5-8 OIP3 Across VDD
TRF1208-EP IMD3 Lower Across VDD
At (2f1 – f2) frequency, f1 < f2; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-10 IMD3 Lower Across VDD
TRF1208-EP IMD3 Higher Across VDD
At (2f2 – f1) frequency, f1 < f2; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-12 IMD3 Higher Across VDD
TRF1208-EP OIP2 Lower Across VDD
At (f2 – f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-14 OIP2 Lower Across VDD
TRF1208-EP OIP2 Higher Across VDD
At (f2 + f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-16 OIP2 Higher Across VDD
TRF1208-EP IMD2 Lower Across VDD
At (f2 – f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-18 IMD2 Lower Across VDD
TRF1208-EP IMD2 Higher Across VDD
At (f2 + f1) frequency, f2 > f1; PO/tone = –4dBm,
10MHz tone spacing
Figure 5-20 IMD2 Higher Across VDD
TRF1208-EP HD2 Across VDD
PO = +3dBm
Figure 5-22 HD2 Across VDD
TRF1208-EP HD3 Across VDD
PO = +3dBm
Figure 5-24 HD3 Across VDD
TRF1208-EP HD3 vs Output Power
 
Figure 5-26 HD3 vs Output Power
TRF1208-EP Output P1dB Across VDD
 
Figure 5-28 Output P1dB Across VDD
TRF1208-EP NF Across VDD
 
Figure 5-30 NF Across VDD
TRF1208-EP Phase Imbalance
 
Figure 5-32 Phase Imbalance
TRF1208-EP CMRR Across VDD
 
Figure 5-34 CMRR Across VDD
TRF1208-EP Saturation Voltage (Differential)
Input = +6dBm
Figure 5-36 Saturation Voltage (Differential)
TRF1208-EP Additive (Residual) Phase Noise
f = 1GHz, PIN = –10dBm
Figure 5-38 Additive (Residual) Phase Noise
TRF1208-EP Differential S22
Figure 5-40 Differential S22