SCDS430A December   2020  – May 2021 TS3DV642-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 High-Speed Performances
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Demultiplexing HDMI Signals
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application - Multiplexing HDMI Signals
    4. 9.4 Systems Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUA|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Switching Characteristics

over recommended operation free-air temperature range, VDD =3.3 V± 0.3 V (unless otherwise noted).   For all data pins.
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
tpd Propagation Delay All I/O 66 ps
tSK,INTER Inter-pair Skew D0-3 The maximum difference in differential prop delay between data channels; 1.7 GHz; at nominal corner 10 ps
tSK,INTRA Intra-pair Skew D0-3 The maximum difference in prop delay between +ve and –ve signals of each channel (for all channels); at 1.7 GHz; at nominal corner 8 ps
tON (2) Switch turn-on time All I/O When EN goes from L to H 5 µs
tSWITCH (3) Switching time between channels All I/O When SEL pins toggles 5 µs
(1) All typical values are at VDD = 3.3 V(unless otherwise noted), TA = 25°C.
(2) tON is the time it takes the output to recover within 95% of final value after enabling switches
(3) tSWITCH is the time it takes for theoutput to recover within 95% of final value after the state is changed