SLLSF93A June   2019  – January 2025 TUSB8042A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Variants
    1. 4.1 Device Version Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagrams
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Battery Charging Features
      2. 7.3.2 USB Power Management
      3. 7.3.3 One-Time Programmable (OTP) Configuration
      4. 7.3.4 Clock Generation
      5. 7.3.5 Crystal Requirements
      6. 7.3.6 Input Clock Requirements
      7. 7.3.7 Power-Up and Reset
    4. 7.4 Device Functional Modes
      1. 7.4.1 External Configuration Interface
      2. 7.4.2 I2C EEPROM Operation
      3. 7.4.3 Port Configuration
      4. 7.4.4 SMBus Target Operation
  9. 8 Register Maps
    1. 8.1  Configuration Registers
    2. 8.2  ROM Signature Register
    3. 8.3  Vendor ID LSB Register
    4. 8.4  Vendor ID MSB Register
    5. 8.5  Product ID LSB Register
    6. 8.6  Product ID MSB Register
    7. 8.7  Device Configuration Register
    8. 8.8  Battery Charging Support Register
    9. 8.9  Device Removable Configuration Register
    10. 8.10 Port Used Configuration Register
    11. 8.11 Device Configuration Register 2
    12. 8.12 USB 2.0 Port Polarity Control Register
    13. 8.13 UUID Registers
    14. 8.14 Language ID LSB Register
    15. 8.15 Language ID MSB Register
    16. 8.16 Serial Number String Length Register
    17. 8.17 Manufacturer String Length Register
    18. 8.18 Product String Length Register
    19. 8.19 Device Configuration Register 3
    20. 8.20 USB 2.0 Only Port Register
    21. 8.21 Serial Number String Registers
    22. 8.22 Manufacturer String Registers
    23. 8.23 Product String Registers
    24. 8.24 Additional Feature Configuration Register
    25. 8.25 SMBus Device Status and Command Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Discrete USB Hub Product
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Upstream Port Implementation
          2. 9.2.1.2.2 Downstream Port 1 Implementation
          3. 9.2.1.2.3 Downstream Port 2 Implementation
          4. 9.2.1.2.4 Downstream Port 3 Implementation
          5. 9.2.1.2.5 Downstream Port 4 Implementation
          6. 9.2.1.2.6 VBUS Power Switch Implementation
          7. 9.2.1.2.7 Clock, Reset, and Misc
          8. 9.2.1.2.8 TUSB8042A Power Implementation
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 TUSB8042A Power Supply
      2. 9.3.2 Downstream Port Power
      3. 9.3.3 Ground
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Placement
        2. 9.4.1.2 Package Specific
        3. 9.4.1.3 Differential Pairs
      2. 9.4.2 Layout Examples
        1. 9.4.2.1 Upstream Port
        2. 9.4.2.2 Downstream Port
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 One-Time Programmable (OTP) Configuration

The TUSB8042A allows device configuration through one-time programmable non-volatile memory (OTP). The programming of the OTP is supported using vendor-defined USB device requests. For details using the OTP features please contact your TI representative.

Table 7-3 provides a list features which can be configured using the OTP.

Table 7-3 OTP Configurable Features
CONFIGURATION REGISTER OFFSETBIT FIELDDESCRIPTION
REG_01h[7:0]Vendor ID LSB
REG_02h[7:0]Vendor ID MSB
REG_03h[7:0]Product ID LSB
REG_04h[7:0]Product ID MSB
REG_07h[0]Port removable configuration for downstream ports 1. OTP configuration is inverse of rmbl[3:0]; that is, 1 = not removable, 0 = removable.
REG_07h[1]Port removable configuration for downstream ports 2. OTP configuration is inverse of rmbl[3:0]; that is, 1 = not removable, 0 = removable.
REG_07h[2]Port removable configuration for downstream ports 3. OTP configuration is inverse of rmbl[3:0]; that is, 1 = not removable, 0 = removable.
REG_07h[3]Port removable configuration for downstream ports 4. OTP configuration is inverse of rmbl[3:0]; that is, 1 = not removable, 0 = removable.
REG_08h[3:0]Port used Configured register.
REG_0Ah[1]Battery Charger Automatic Mode enable.
REG_0Ah[4]High-current divider mode enable.
REG_0Bh[0]USB 2.0 port polarity configuration for upstream port.
REG_0Bh[1]USB 2.0 port polarity configuration for downstream ports 1.
REG_0Bh[2]USB 2.0 port polarity configuration for downstream ports 2.
REG_0Bh[3]USB 2.0 port polarity configuration for downstream ports 3.
REG_0Bh[4]USB 2.0 port polarity configuration for downstream ports 4.
REG_25h[4:0]Device Configuration Register 3
REG_26h[3:0]USB2.0 Only Port Register
REG_F0h[3:1]USB BC power switch power off duration during automode.