SLLSF93A June   2019  – January 2025 TUSB8042A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Variants
    1. 4.1 Device Version Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagrams
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Battery Charging Features
      2. 7.3.2 USB Power Management
      3. 7.3.3 One-Time Programmable (OTP) Configuration
      4. 7.3.4 Clock Generation
      5. 7.3.5 Crystal Requirements
      6. 7.3.6 Input Clock Requirements
      7. 7.3.7 Power-Up and Reset
    4. 7.4 Device Functional Modes
      1. 7.4.1 External Configuration Interface
      2. 7.4.2 I2C EEPROM Operation
      3. 7.4.3 Port Configuration
      4. 7.4.4 SMBus Target Operation
  9. 8 Register Maps
    1. 8.1  Configuration Registers
    2. 8.2  ROM Signature Register
    3. 8.3  Vendor ID LSB Register
    4. 8.4  Vendor ID MSB Register
    5. 8.5  Product ID LSB Register
    6. 8.6  Product ID MSB Register
    7. 8.7  Device Configuration Register
    8. 8.8  Battery Charging Support Register
    9. 8.9  Device Removable Configuration Register
    10. 8.10 Port Used Configuration Register
    11. 8.11 Device Configuration Register 2
    12. 8.12 USB 2.0 Port Polarity Control Register
    13. 8.13 UUID Registers
    14. 8.14 Language ID LSB Register
    15. 8.15 Language ID MSB Register
    16. 8.16 Serial Number String Length Register
    17. 8.17 Manufacturer String Length Register
    18. 8.18 Product String Length Register
    19. 8.19 Device Configuration Register 3
    20. 8.20 USB 2.0 Only Port Register
    21. 8.21 Serial Number String Registers
    22. 8.22 Manufacturer String Registers
    23. 8.23 Product String Registers
    24. 8.24 Additional Feature Configuration Register
    25. 8.25 SMBus Device Status and Command Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Discrete USB Hub Product
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Upstream Port Implementation
          2. 9.2.1.2.2 Downstream Port 1 Implementation
          3. 9.2.1.2.3 Downstream Port 2 Implementation
          4. 9.2.1.2.4 Downstream Port 3 Implementation
          5. 9.2.1.2.5 Downstream Port 4 Implementation
          6. 9.2.1.2.6 VBUS Power Switch Implementation
          7. 9.2.1.2.7 Clock, Reset, and Misc
          8. 9.2.1.2.8 TUSB8042A Power Implementation
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 TUSB8042A Power Supply
      2. 9.3.2 Downstream Port Power
      3. 9.3.3 Ground
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Placement
        2. 9.4.1.2 Package Specific
        3. 9.4.1.3 Differential Pairs
      2. 9.4.2 Layout Examples
        1. 9.4.2.1 Upstream Port
        2. 9.4.2.2 Downstream Port
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.3 Port Configuration

The TUSB8042A port configurations can be selected by registers or efuse. The Port Used Configuration register (USED[3:0]) define how many ports can possibly be reported by the hub. The device removable configuration register (RMBL[3:0]) define if the ports that USB 3.2 are reported as used have permanently connected devices or not. The USB 2.0 Only Port register (USB2_ONLY[3:0]) define whether or not a used port is reported as part of the USB 2.0 hub or both the USB2.0 and SS hubs. The USB2_ONLY field enables the USB2.0 port even if the corresponding USED bit is low. Table 7-4 shows examples of the possible combinations.

Table 7-4 TUSB8042A Downstream Port Configuration Examples
USED[3:0]RMBL[3:0]USB2_ONLY
[3:0]		Reported Port ConfigurationPhysical to Logical Port mapping
1111111100004 Port USB 3.2 Hub
4 Port USB2.0 Hub

Physical1 => Logical Port1 for USB 3.2 and USB2.0.


Physical2 => Logical Port2 for USB 3.2 and USB2.0.


Physical3 => Logical Port3 for USB 3.2 and USB2.0.


Physical4 => Logical Port4 for USB 3.2 and USB2.0.

1110111100003 Port USB 3.2 Hub
3 Port USB2.0 Hub

Physical1 Not used.


Physical2 => Logical Port1 for USB 3.2 and USB2.0.


Physical3 => Logical Port2 for USB 3.2 and USB2.0.


Physical4 => Logical Port3 for USB 3.2 and USB2.0.

1100011100002 Port USB 3.2 Hub
2 Port USB2.0 hub with permanently attached device on Port 2

Physical1 Not used.


Physical2 Not used.


Physical3 => Logical Port1 for USB 3.2 and USB2.0.


Physical4 => Logical Port2 for USB 3.2 and USB2.0.

0011111100101 Port USB 3.2 Hub
2 Port USB 2.0 Hub

Physical1 => Logical Port1 for USB 3.2 and USB2.0.


Physical2 => Logical Port2 for USB2.0.


Physical3 Not Used.


Physical4 Not used.

1000111100101 Port USB 3.2 Hub
2 Port USB 2.0 Hub

Physical1 Not used.


Physical2 => Logical Port2 for USB2.0.


Physical3 Not used


Physical4 => Logical Port1 for USB 3.2 and USB2.0.

1111111111101 Port USB 3.2 Hub
4 Port USB 2.0 Hub

Physical1 => Logical Port1 for USB 3.2 and USB2.0.


Physical2 => Logical Port2 for USB2.0.


Physical3 => Logical Port3 for USB2.0.


Physical4 => Logical Port4 for USB2.0.