SLUSAD7B April   2011  – July 2016 UCC25710

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Multi-transformer Architecture
      2. 8.3.2 Start-Up and Non-Dimming Operation
      3. 8.3.3 Dimming Operation
      4. 8.3.4 Fault Condition Operation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Determining Transformer and Resonant Circuit Parameters
        2. 9.2.2.2  CS (Output Current Sense)
        3. 9.2.2.3  ICOMP (Current Amplifier Compensation)
        4. 9.2.2.4  SS (Soft Start)
        5. 9.2.2.5  FMAX (Maximum VCO Frequency)
        6. 9.2.2.6  FMIN (Minimum VCO Frequency)
        7. 9.2.2.7  GD1 and GD2 (Gate Drive 1 and 2)
        8. 9.2.2.8  LEDSW (LED Switch Drive)
        9. 9.2.2.9  DSR (Dimming Slew Rate)
        10. 9.2.2.10 DTY (Dimming Duty-Cycle Average)
        11. 9.2.2.11 DADJ (Dimming Duty-Cycle Adjust)
        12. 9.2.2.12 OV (Output Overvoltage)
        13. 9.2.2.13 UV (Output Undervoltage)
        14. 9.2.2.14 CL (Current Limit)
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resource
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Description (continued)

The LED current loop reference is set by a divider off the VREF 5-V output. The reference can be varied over a 0.5-V to 2.6-V range, allowing analog dimming to be combined with PWM dimming.

PWM dimming is used to control an external LED series switch and also to gate on and off the LLC power stage. The LEDSW output along with a simple drive circuit is used to switch on and off the LED string current. This output responds directly to the input signal at the dimming input, DIM. The LLC is also ramped on and off with the dimming PWM input. The on and off LLC dimming edges are ramped at programmable slew rates to control audible noise. The dimming function includes duty-cycle compensation to allow optimization of overall efficiency and dimming linearity over a maximum range.

The control voltage to the VCO is set by ICOMP (current amplifier output) during LED ON-times. During start-up the soft-start pin, SS, controls the VCO response until it exceeds ICOMP. During dimming the rise and fall rates of the VCO input are controlled by the voltage at the dimming slew rate, DSR, pin while the pedestal of VCO control level continues to be controlled by ICOMP. The current amplifier output is connected to ICOMP only during the commanded dimming LED ON-time. The LLC on-time is extended beyond the LED current ON-time at low dimming duty-cycles to maintain closed-loop control of the LED current.

Protection thresholds for LED string overvoltage and undervoltage conditions are set with external resistive dividers and accurate internal thresholds. Input current to the converter is monitored with both a restart and latch-off response depending on the overcurrent level. The controller also includes thermal shutdown protection.

The auto restart response to any fault includes a 10-ms reset period followed by a soft start. In the case of a severe input overcurrent, restart is disabled until the input supply is cycled through its UVLO threshold.