SLUSDX3C november   2020  – august 2023 UCC25800-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Management
      2. 8.3.2 Oscillator
      3. 8.3.3 External Synchronization
      4. 8.3.4 Dead-Time
        1. 8.3.4.1 Adaptive Dead-time
        2. 8.3.4.2 Maximum Programmable Dead-time
      5. 8.3.5 Protections
        1. 8.3.5.1 Overcurrent Protection
          1. 8.3.5.1.1 OCP Threshold Setting
          2. 8.3.5.1.2 Output Power Capability
        2. 8.3.5.2 Input Overvoltage Protection (OVP)
        3. 8.3.5.3 Over-Temperature Protection (TSD)
        4. 8.3.5.4 Pin-Fault Protections
        5. 8.3.5.5 VREG Pin Protection
      6. 8.3.6 DIS/FLT Pin operation
        1. 8.3.6.1 FAULT Codes
    4. 8.4 Device Functional Modes
      1. 8.4.1 UVLO Mode
      2. 8.4.2 Soft-start Mode
      3. 8.4.3 Normal Operation Mode
      4. 8.4.4 Disabled Mode
      5. 8.4.5 Fault Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 LLC Converter Operation Principle
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
    3. 9.3 What to Do and What Not to Do
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Overview

Modern high-voltage, high-power-inverter, and motor-drive applications require floating bias supply voltages to power at least the high-side totem-pole switches, where source (and gate) voltages move up and down with the inverter switch-node. The traditional way of providing small amounts of isolated bias power has been to use a flyback converter. Often a single flyback converter with multiple outputs can generate the required rails for all the switches. However, issues with reliability, redundancy, shock and vibration testing, noise immunity and particularly EMI and common mode current have led to a trend away from the flyback topology and centralized architecture toward distributed open-loop approaches. The open-loop approaches such as 50% duty cycle push-pull, open-loop half bridge or full bridge without an output inductor are deployed while the flyback converter or flybuck (an isolated buck converter) continue to be used by some designs to provide regulated outputs despite the larger common-mode capacitance (transformer primary-side to secondary-side parasitic capacitance). With the adoption of SiC and GaN devices, the inverter power stage switches at a much higher dv/dt. This behavior causes much larger common-mode current injection through the isolated bias transformers and drives the needs for a bias supply design with minimum parasitic capacitance. The need to further reduce the primary-to-secondary capacitance without suffering performance degradation has led some designs to deploy resonant topologies such as the LLC. As the leakage inductance in an LLC is a component of the power train, the topology can enable a higher leakage inductance transformer to be used with an associated reduction in the parasitic primary-secondary capacitance. The UCC25800-Q1 transformer driver is a small, simple controller enabling this topology to be deployed with low component count, integrated protection features, high switching frequency, high parameter tolerance and robust operation. An 8-pin DGN package with thermal pad is used to provide up to 6-W power handling capability with 24-V input.