SLUSCG0A December   2015  – January 2016 UCC27211A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Diagram
      2.      Propagation Delays vs Supply Voltage T = 25°C
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stages
      2. 8.3.2 Undervoltage Lockout (UVLO)
      3. 8.3.3 Level Shift
      4. 8.3.4 Boot Diode
      5. 8.3.5 Output Stages
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Threshold Type
        2. 9.2.2.2 VDD Bias Supply Voltage
        3. 9.2.2.3 Peak Source and Sink Currents
        4. 9.2.2.4 Propagation Delay
        5. 9.2.2.5 Power Dissipation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

VDD = VHB = 12 V, VHS = VSS = 0 V, no load on LO or HO, TA = TJ = –40°C to 140°C, (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
SUPPLY CURRENTS
IDD VDD quiescent current V(LI) = V(HI) = 0 V 0.05 0.085 0.17 mA
IDDO VDD operating current f = 500 kHz, CLOAD = 0 2.1 2.5 6.5 mA
IHB Boot voltage quiescent current V(LI) = V(HI) = 0 V 0.015 0.065 0.1 mA
IHBO Boot voltage operating current f = 500 kHz, CLOAD = 0 1.5 2.5 5.1 mA
IHBS HB to VSS quiescent current V(HS) = V(HB) = 115 V 0.0005 1 µA
IHBSO HB to VSS operating current f = 500 kHz, CLOAD = 0 0.07 1.2 mA
INPUT
VHIT Input voltage threshold 1.7 2.3 2.55 V
VLIT Input voltage threshold 1.2 1.6 1.9 V
VIHYS Input voltage hysteresis 700 mV
RIN Input pulldown resistance 68 kΩ
UNDER-VOLTAGE LOCKOUT (UVLO)
VDDR VDD turnon threshold 6.2 7 7.8 V
VDDHYS Hysteresis 0.5 V
VHBR VHB turnon threshold 5.6 6.7 7.9 V
VHBHYS Hysteresis 1.1 V
BOOTSTRAP DIODE
VF Low-current forward voltage IVDD-HB = 100 µA 0.65 0.8 V
VFI High-current forward voltage IVDD-HB = 100 mA 0.85 0.95 V
RD Dynamic resistance, ΔVF/ΔI IVDD-HB = 100 mA and 80 mA 0.3 0.5 0.85 Ω
LO GATE DRIVER
VLOL Low-level output voltage ILO = 100 mA 0.05 0.1 0.19 V
VLOH High level output voltage ILO = –100 mA, VLOH = VDD – VLO 0.1 0.16 0.29 V
Peak pullup current(3) VLO = 0 V 3.7 A
Peak pulldown current(3) VLO = 12 V 4.5 A
HO GATE DRIVER
VHOL Low-level output voltage IHO = 100 mA 0.05 0.1 0.19 V
VHOH High-level output voltage IHO = –100 mA, VHOH = VHB – VHO 0.1 0.16 0.29 V
Peak pullup current(3) VHO = 0 V 3.7 A
Peak pulldown current(3) VHO = 12 V 4.5 A
(1) Typical values for TA = 25°C.
(2) IF: Forward current applied to bootstrap diode, IREV: Reverse current applied to bootstrap diode.
(3) Ensured by design.