SLUS545F November   2002  – November 2023 UCC27423 , UCC27424 , UCC27425

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dissipation Ratings
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Input Stage
      3. 7.3.3 Output Stage
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Source and Sink Capabilities During Miller Plateau
        2. 8.2.2.2 Parallel Outputs
        3. 8.2.2.3 VDD
        4. 8.2.2.4 Drive Current and Power Requirements
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • DGN|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Dissipation Ratings

PACKAGESUFFIXPOWER RATING (mW)
TA = 70°C(1)		DERATING FACTOR ABOVE
70°C (mW/°C)(1)
SOIC-8D344–655(2)6.25–11.9(2)
PDIP-8P5009
MSOP(3)DGN137017.1
(1) 125°C operating junction temperature is used for power rating calculations
(2) The range of values indicates the effect of pc-board. These values are intended to give the system designer an indication of the best and worst case conditions. In general, the system designer should attempt to use larger traces on the pc-board where possible in order to spread the heat away form the device more effectively. For information on the PowerPAD™ package, refer to Technical Brief, PowerPad Thermally Enhanced Package, Texas Instruments (SLMA002) and Application Brief, PowerPad Made Easy, Texas Instruments (SLMA004).
(3) The PowerPAD™ is not directly connected to any leads of this package. However, it is electrically and thermally connected to the substrate which is the ground of the device.
GUID-20220713-SS0I-Z06R-ZCNZ-MCCBX540GDRW-low.gifFigure 6-1 Inverting Driver Switching
GUID-20220713-SS0I-GX2Z-SGDS-45GRKKXSC87L-low.gifFigure 6-2 Noninverting Driver Switching
GUID-0BCA497E-758E-413C-B185-58EAEA2DE0F5-low.gif
The 10% and 90% thresholds depict the dynamics of the BiPolar output devices that dominate the power MOSFET transition through the Miller regions of operation.
Figure 6-3 Switching Waveform for Enable to Output