SLUSBW3D March   2014  – December 2017 UCC28630 , UCC28631 , UCC28632 , UCC28633 , UCC28634


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Typical Application Measured Regulation
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     PIN Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information (UCC28630, UCC28631)
    5. 7.5 Thermal Information (UCC28632, UCC28633, (UCC28630, UCC28634)
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  High-Voltage Current Source Start-Up Operation
      2. 8.3.2  AC Input UVLO / Brownout Protection
      3. 8.3.3  Active X-Capacitor Discharge (UCC28630 and UCC28633 only)
        1. Improved Performance with UCC28630 and UCC28633
      4. 8.3.4  Magnetic Input and Output Voltage Sensing
      5. 8.3.5  Fixed-Point Magnetic Sense Sampling Error Sources
      6. 8.3.6  Magnetic Sense Resistor Network Calculations
        1. Step 1
        2. Step 2
        3. Step 3
        4. Step 4
      7. 8.3.7  Magnetic Sensing: Power Stage Design Constraints
      8. 8.3.8  Magnetic Sense Voltage Control Loop
      9. 8.3.9  Peak Current Mode Control
      10. 8.3.10 IPEAK Adjust vs. Line
      11. 8.3.11 Primary-Side Constant-Current Limit (CC Mode)
      12. 8.3.12 Primary-Side Overload Timer (UCC28630 only)
      13. 8.3.13 Overload Timer Adjustment (UCC28630 only)
      14. 8.3.14 CC-Mode IOUT(lim) Adjustment
      15. 8.3.15 Fault Protections
      16. 8.3.16 Pin-Fault Detection and Protection
      17. 8.3.17 Over-Temperature Protection
      18. 8.3.18 External Fault Input
      19. 8.3.19 External SD Pin Wake Input (except UCC28633)
      20. 8.3.20 External Wake Input at VSENSE Pin (UCC28633 Only)
      21. 8.3.21 Mode Control and Switching Frequency Modulation
      22. 8.3.22 Frequency Dither For EMI (except UCC28632)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Internal Key Parameters
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Notebook Adapter, 19.5 V, 65 W
      2. 9.2.2 UCC28630 Application Schematic
      3. 9.2.3 Design Requirements
      4. 9.2.4 Detailed Design Procedure
        1.  Custom Design With WEBENCH® Tools
        2.  Input Bulk Capacitance and Minimum Bulk Voltage
        3.  Transformer Turn Ratio
        4.  Transformer Magnetizing Inductance
        5.  Current Sense Resistor RCS
        6.  Transformer Constraint Verification
        7.  Transformer Selection and Design
        8.  Slope Compensation Verification
        9.  Power MOSFET and Output Rectifier Selection
        10. Output Capacitor Selection
        11. Calculation of CC Mode Limit Point
        12. VDD Capacitor Selection
        13. Magnetic Sense Resistor Network Selection
        14. Output LED Pre-Load Resistor Calculation
      5. 9.2.5 External Wake Pulse Calculation at VSENSE Pin (UCC28633 Only)
      6. 9.2.6 Energy Star Average Efficiency and Standby Power
      7. 9.2.7 Application Performance Plots
    3. 9.3 Dos and Don'ts
      1. 9.3.1 Test and Debug Recommendations
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 HV Pin
      2. 11.1.2 VDD Pin
      3. 11.1.3 VSENSE Pin
      4. 11.1.4 CS Pin
      5. 11.1.5 SD Pin
      6. 11.1.6 DRV Pin
      7. 11.1.7 GND Pin
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
        1. Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

High-Voltage Current Source Start-Up Operation

The controller includes a switched, high-voltage, current source on the HV pin to allow fast start-up, and eliminates the static power dissipation in a conventional resistive start-up approach. This feature reduces standby power consumption.

The HV pin has three major functions:

The UCC28630 and UCC28633 input supply to the HV start-up pin must be connected to the AC side of the bridge rectifier as shown in Figure 15, in order to support X-capacitor discharge. More details are given in Active X-Capacitor Discharge (UCC28630 and UCC28633 only), below. Connection to the AC side of the bridge also allows faster detection of AC mains removal under latched fault conditions, allowing prompt reset of latched faults for fast restart.

UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 Fig156341.gifFigure 15. HV Pin Connection: (a) AC-side, (b) DC-side (UCC28631, UCC28632 and UCC28634 only)

In the UCC28631, UCC28632 and UCC28634, the HV pin can connect to either the AC or DC side of the bridge. The addition of the 200-kΩ external HV resistance (required for X-capacitor discharge sensing) limits the available charging current for the external bias supply input capacitor. However, for typical values of between 22 µF and 33 µF of input capacitance, start-up bias times of less than 1.5 s are achievable at 90 VAC. Start-up time can be estimated using Equation 1.

Equation 1. UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu1_lusbw3.gif


  • UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 qu2_lusbw3.giffor AC connection and VIN(avg) = VRMS x √2 for DC connection

For 90 VAC, if CVDD = 22 µF and worst case VDD(start_max) = 16.5 V, then tSTART is 1.002 s.

Figure 16 illustrates the start-up behavior of the controller. The HV current source has built-in short-circuit protection that limits the initial charge current out of the bias voltage pin until the bias voltage reaches VDD(sc). This limits the power dissipated in the HV current source in the event of a short circuit on the VDD pin. Thereafter, the HV current source switches to full available current. The controller remains in a low-power, start-up mode until the bias voltage reaches VDD(start), after which the HV current source is turned off and the controller initiates a start-up sequence.

The bias voltage decays during the start-up sequence at a rate dependent on the size of the energy storage capacitor connected to the VDD pin. The VDD storage capacitor must be sized appropriately to ensure adequate energy storage to supply both the controller bias power and MOSFET drive power during start-up, until the VDD rail can be supplied through the transformer bias winding. If the bias voltage falls below VDD(stop) (due to bias winding fault or an inadequate VDD storage capacitance), the controller stops switching, and transitions into low-power mode for a time delay of tRESET(long), or until the bias voltage falls to the VDD(reset) level, whichever is shorter. See VDD Capacitor Selection for required VDD capacitor sizing. Once the time delay elapses, the bias voltage rapidly discharges to the VDD(reset) level, followed by turn-on of the internal HV current source, and a normal restart attempt follows.

UCC28630 UCC28631 UCC28632 UCC28633 UCC28634 fig18_lusbw3.gifFigure 16. Normal Start-Up Sequence,
(assuming VAC > UV start threshold)