SLUSBW3D March   2014  – December 2017

PRODUCTION DATA.

1. Features
2. Applications
3. Description
1.     Device Images
4. Revision History
5. Device Comparison Table
6. Pin Configuration and Functions
7. Specifications
8. Detailed Description
1. 8.1 Overview
2. 8.2 Functional Block Diagram
3. 8.3 Feature Description
4. 8.4 Device Functional Modes
9. Applications and Implementation
1. 9.1 Application Information
2. 9.2 Typical Application
3. 9.3 Dos and Don'ts
10. 10Power Supply Recommendations
11. 11Layout
1. 11.1 Layout Guidelines
2. 11.2 Layout Example
12. 12Device and Documentation Support
1. 12.1 Device Support
1. 12.1.1 Development Support
2. 12.2 Documentation Support
1. 12.2.1 Related Documentation
4. 12.4 Community Resources
6. 12.6 Electrostatic Discharge Caution
7. 12.7 Glossary
13. 13Mechanical, Packaging, and Orderable Information

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#### 8.3.11 Primary-Side Constant-Current Limit (CC Mode)

In addition to the peak-current mode PWM function, the device also uses sensed current at the CS pin to estimate the secondary-side load current. The device samples the CS pin voltage and measures it in the middle of the on-time, which is effectively the average switch current during the on time, ISW(avg_on). This measurement scheme is the case during both DCM and CCM operational modes. The average switch current during the on time is scaled by the PWM duty cycle to give the IIN(avg) of the power stage. The power stage input power, PIN, can then be estimated as the product of (VIN x IIN(avg)). The CC mode operation regulates PIN to track (IOUT(lim) x VOUT), if PIN increases to reach PIN(lim), thereby achieving a regulated constant current as shown in Equation 18.

Equation 18.
Equation 19.

Assuming that the power stage efficiency does not change significantly with operating point, by regulating the input power in inverse proportion to output voltage, this regulates output current. This achieves a brick-wall CC characteristic, where the output current is regulated as the input voltage changes and as the output voltage rolls off, regardless of power stage operating mode (CCM or DCM). The CC mode protection eliminates the characteristic load current tail-out that is typically seen with peak-current mode control as output voltage collapses and operation goes deeper into CCM mode.

NOTE

As the output voltage decreases in CC mode, the VDD level also decreases. If the overload is severe, the drop in output voltage causes VDD to drop below the VDD(stop) UV level. This drop causes a shutdown for tRESET(long), as given in Table 6, followed by a restart attempt.

The constant-current mode output current limit level (IOUT(lim)) is a function of both the RCS1 resistor and the transformer turns ratio. The device uses an internal reference and gain for the CC loop, KCC1 and KCC2, that set the CC IOUT(lim) point as a function of the chosen turns ratio, output voltage and current sense resistance as shown in Equation 20.

Equation 20.