SLUSC18A September   2014  – March 2015 UCC29950

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1. 5.1 Detailed Pin Descriptions
      1. 5.1.1  VCC
      2. 5.1.2  MD_SEL/PS_ON
      3. 5.1.3  SUFG, SUFS
      4. 5.1.4  GD1, GD2
      5. 5.1.5  GND
      6. 5.1.6  AGND
      7. 5.1.7  LLC_CS
      8. 5.1.8  FB
      9. 5.1.9  PFC_GD
      10. 5.1.10 PFC_CS
      11. 5.1.11 VBULK
      12. 5.1.12 AC1, AC2
      13. 5.1.13 AC_DET
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Storage Conditions
    3. 6.3 ESD Ratings
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Sense Networks
      2. 7.3.2  Sense Network Fault Detection
      3. 7.3.3  PFC Stage Soft-Start
      4. 7.3.4  AC Line Voltage Sensing
      5. 7.3.5  VBLK Sensing
      6. 7.3.6  AC Input UVLO and Brownout Protection
      7. 7.3.7  Dither
      8. 7.3.8  Active X-Cap Discharge
      9. 7.3.9  LLC Stage Soft Start
      10. 7.3.10 PFC Stage Current Sensing
      11. 7.3.11 Input Power Limit
      12. 7.3.12 PFC Stage Soft Start
      13. 7.3.13 Hybrid PFC Control Loop
      14. 7.3.14 PFC Stage Second Current Limit
      15. 7.3.15 PFC Inductor and Bulk Capacitor Recommendations
      16. 7.3.16 PFC Stage Over Voltage Protection
      17. 7.3.17 LLC Stage Control
      18. 7.3.18 Driver Output Stages and Characteristic
      19. 7.3.19 LLC Stage Dead Time Profile
      20. 7.3.20 LLC Stage Current Sensing
      21. 7.3.21 LLC Three Level Over-Current Protection
      22. 7.3.22 Over-Temperature Protection
      23. 7.3.23 Fault Timer and Control
    4. 7.4 Device Functional Modes
      1. 7.4.1 Mode Selection
      2. 7.4.2 Start-Up in Aux Bias Mode
      3. 7.4.3 Start-Up Operation in Self-Bias Mode
      4. 7.4.4 Bias Rail UVLO
      5. 7.4.5 LLC Stage MOSFET Drive
      6. 7.4.6 Gate Drive Transformer
      7. 7.4.7 Gate Drive Device
      8. 7.4.8 Comparison
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  LLC Stage
        2. 8.2.2.2  LLC Switching Frequency
        3. 8.2.2.3  LLC Transformer Turns Ratio
        4. 8.2.2.4  LLC Stage Equivalent Load Resistance
        5. 8.2.2.5  LLC Gain Range
        6. 8.2.2.6  Select LN and QE
        7. 8.2.2.7  LLC No-Load Gain
        8. 8.2.2.8  Parameters of the LLC Resonant Circuit
        9. 8.2.2.9  Verify the LLC Resonant Circuit Design
        10. 8.2.2.10 LLC Primary-Side Currents
        11. 8.2.2.11 LLC Secondary-Side Currents
        12. 8.2.2.12 LLC Transformer
        13. 8.2.2.13 LLC Resonant Inductor
        14. 8.2.2.14 Combining the LLC Resonant Inductor and Transformer
        15. 8.2.2.15 LLC Resonant Capacitor
        16. 8.2.2.16 LLC Stage with Split Resonant Capacitor
        17. 8.2.2.17 LLC Primary-Side MOSFETs
        18. 8.2.2.18 LLC Output Rectifier Diodes
        19. 8.2.2.19 LLC Stage Output Capacitors
        20. 8.2.2.20 LLC Stage Over-Current Protection, Current Sense Resistor
        21. 8.2.2.21 Detailed Design Procedure for the PFC stage
        22. 8.2.2.22 PFC Stage Output Current Calculation
        23. 8.2.2.23 Line Current Calculation
        24. 8.2.2.24 Bridge Rectifier
        25. 8.2.2.25 PFC Boost Inductor
        26. 8.2.2.26 PFC Input Capacitor
        27. 8.2.2.27 PFC Stage MOSFET
        28. 8.2.2.28 PFC Boost Diode
        29. 8.2.2.29 Bulk Capacitor
        30. 8.2.2.30 PFC Stage Current Sense Resistor
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1  GND Pin
      2. 10.1.2  GD1, GD2 Pins
      3. 10.1.3  VCC Pin
      4. 10.1.4  SUFG Pin
      5. 10.1.5  SUFS Pin
      6. 10.1.6  AGND Pin
      7. 10.1.7  MD_SEL/PS_ON Pin
      8. 10.1.8  VBULK Pin
      9. 10.1.9  AC1, AC2 Pins
      10. 10.1.10 LLC_CS
      11. 10.1.11 FB
      12. 10.1.12 PFC_CS
      13. 10.1.13 AC_DET
      14. 10.1.14 PFC_GD
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • High Efficiency PFC and Half-Bridge Resonant LLC Combo Controller
  • Continuous Conduction Mode (CCM) Boost Power Factor Correction
  • Supports Self-Bias or Auxiliary (external) Bias Mode of Operation
  • PFC Loops Fully Internally Compensated
  • PFC Stage Design in 3 Easy Steps
    (design voltage feedback, current feedback and power stage)
  • Fixed 100-kHz PFC Frequency with Dithering for Ease of EMI Compliance
  • True Input Power Limit, Independent of Line Voltage
  • Fixed LLC Frequency Operating Range of 70 kHz to 350 kHz
  • Dead-Time Varied Across Load Range for LLC Half-Bridge Power Stage to Extend ZVS Range
  • Three-Level LLC Over-Current Protection
  • Hiccup Mode Operation for Continuous Overload and Short-Circuit Power Protection
  • Low Standby Power Consumption Enabled by Active Control of High-Voltage Start-Up MOSFET and X-Cap Discharge Function
  • Built In Soft-Start and Converter Sequencing to Simplify Design
  • AC Line Brownout Protection, with Fail Indicator
  • PFC Bus Over-Voltage and Under-Voltage Protection
  • Over-Temperature Protection
  • External Gate Drivers for Scalability with Power Level
  • SOIC-16 Package

2 Applications

  • Offline AC-to-DC Server Power Supplies (80 PLUS® Bronze/Silver/Gold)
  • Industrial DIN Rail and Open Frame Power Supplies
  • Gaming and Printer Power
  • High-Density Adapters
  • Lighting Drivers

3 Description

The UCC29950 provides all the control functionality for an AC-to-DC converter with a CCM boost Power Factor Correction (PFC) stage followed by an LLC converter stage. The controller is optimized to allow ease of use.

Proprietary CCM PFC algorithms enable the system to achieve high efficiency, smaller converter size with high power factor. The integrated LLC controller enables a high-efficiency DC-to-DC conversion stage utilizing soft switching for low EMI noise. Integration of PFC control and LLC control in a combo controller allows the control algorithms to take advantage of information from both stages.

The controller includes a control circuit for start-up using a Depletion Mode MOSFET with internal device power management that minimizes external component requirements and helps lower system implementation costs.

To further reduce the standby power an X-Cap discharge circuit is integrated. The UCC29950 implements a complete suite of system protection functions, including AC line brownout, PFC bus under voltage PFC and LLC, over current and thermal shutdown.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
UCC29950 SOIC 16 Pin (D) 9.90 mm x 6.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Schematic

UCC29950 alt_lusc18.gif

LLC stage Over-Current Protection Profile

UCC29950 alt2_lusc18.gif