SLVSJ14 August   2025 UCC57132-Q1 , UCC57138-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Enable/Fault (EN/FLT)
      3. 6.3.3 Driver Stage
      4. 6.3.4 Overcurrent (OC) Protection
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Driving MOSFET/IGBT/SiC MOSFET
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 VDD Undervoltage Lockout
          2. 7.2.1.2.2 Power Dissipation
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Consideration
  9. Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Design Requirements

When selecting the gate driver device for an end application, some design considerations must be evaluated in order to make the most appropriate selection. Following are some of the design parameters that should be used when selecting the gate driver device for an end application: input-to-output configuration, the input threshold type, bias supply voltage levels, peak source and sink currents, availability of independent enable and disable functions, propagation delay, power dissipation, and package type. See the example design parameters and requirements in Table 7-1.

Table 7-1 Design Parameters
DESIGN PARAMETEREXAMPLE VALUE
Input to output logicNon-inverting
Input threshold typeTTL
Bias supply voltage levels+18V
Negative output low voltageN/A
Enable functionYes
Disable functionN/A
Propagation delay<30ns
Power dissipation<1W
Package type

SOIC-8