SLVSC86A January   2014  – March 2014 UCD9244-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Terminal Configuration and Functions
    1.     Terminal Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Electrical Characteristics (Continued)
    7. 7.7  ADC Monitoring Intervals And Response Times
    8. 7.8  Hardware Fault Detection Latency
    9. 7.9  PMBus/SMBus/I2C
    10. 7.10 I2C/SMBus/PMBus Timing Requirements
    11. 7.11 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PMBus Interface
      2. 8.3.2  Resistor Programmed PMBus Address Decode
      3. 8.3.3  VID Interface
      4. 8.3.4  Jtag Interface
      5. 8.3.5  Bias Supply Generator (Shunt Regulator Controller)
      6. 8.3.6  Power-On Reset
      7. 8.3.7  External Reset
      8. 8.3.8  ON_OFF_CONFIG
      9. 8.3.9  Output Voltage Adjustment
      10. 8.3.10 Calibration
      11. 8.3.11 Analog Front End (AFE)
      12. 8.3.12 Voltage Sense Filtering
      13. 8.3.13 DPWM Engine
      14. 8.3.14 Rail/Power Stage Configuration
      15. 8.3.15 DPWM Phase Synchronization
      16. 8.3.16 Output Current Measurement
      17. 8.3.17 Current Sense Input Filtering
      18. 8.3.18 Over-Current Detection
      19. 8.3.19 Input Voltage Monitoring
      20. 8.3.20 Input UV Lockout
      21. 8.3.21 Temperature Monitoring
      22. 8.3.22 Auxiliary ADC Input Monitoring
      23. 8.3.23 Soft Start, Soft Stop Ramp Sequence
      24. 8.3.24 Non-Volatile Memory Error Correction Coding
      25. 8.3.25 Data Logging
    4. 8.4 Device Functional Modes
      1. 8.4.1 4-Bit VID Mode
      2. 8.4.2 6-Bit VID Mode
      3. 8.4.3 8-Bit VID Mode
      4. 8.4.4 Current Foldback Mode
  9. 9 Applications and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Automatic System Identification (Auto-ID)
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Digital Compensator
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.5 Bias Supply Generator (Shunt Regulator Controller)

The I/O and analog circuits in the UCD9244 require 3.3V to operate. This can be provided using a stand-alone external 3.3V supply, or it can be generated from the main input supply using an internal shunt regulator and an external transistor. Regardless of which method is used to generate the 3.3V supply, bypass capacitors of 0.1 µF and 4.7 µF should be connected from V33A and V33D to ground near the device. An additional bypass capacitor from 0.1 to 1 µF must be connected from the BPCap terminal to ground for the internal 1.8V supply to the device’s logic circuits.

Figure 6 shows a typical application using the external transistor. The base of the transistor is driven by a resistor R1 to Vin and a transconductance amplifier whose output is on the V33FB terminal. The NPN emitter becomes the 3.3V supply for the chip.

UCD9244-EP shunt_reg_lvsal6.gifFigure 6. 3.3V Shunt Regulator Controller I/O

In order to generate the correct voltage on the base of the external pass transistor, the internal transconductance amplifier sinks current into the V33FB terminal and a voltage is produced across R1. This resistor value should be chosen so that ISINK is in the range from 0.2 to 0.4mA. R1 is defined as

Equation 4. UCD9244-EP eq1_lvsal7.gif

Where ISINK is the current into the V33FB terminal; Vin is the power supply input voltage, typically 12V; IE is the current draw of the device and any pull up resistors tied to the 3.3V supply; and β is the beta of the pass transistor. For ISINK = 0.3 mA, Vin=12V, β=99, Vbe = 0.7V and IE=50mA, this formula selects R1 = 10kΩ. Weaker transistors or larger current loads will require less resistance to maintain the desired ISINK current. For example, lowering β to 40 would require R1 = 5.23 kΩ; likewise, an input voltage of 5V requires a value of 1.24 kΩ for R1.