SLVSC86A January   2014  – March 2014 UCD9244-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Terminal Configuration and Functions
    1.     Terminal Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Electrical Characteristics (Continued)
    7. 7.7  ADC Monitoring Intervals And Response Times
    8. 7.8  Hardware Fault Detection Latency
    9. 7.9  PMBus/SMBus/I2C
    10. 7.10 I2C/SMBus/PMBus Timing Requirements
    11. 7.11 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PMBus Interface
      2. 8.3.2  Resistor Programmed PMBus Address Decode
      3. 8.3.3  VID Interface
      4. 8.3.4  Jtag Interface
      5. 8.3.5  Bias Supply Generator (Shunt Regulator Controller)
      6. 8.3.6  Power-On Reset
      7. 8.3.7  External Reset
      8. 8.3.8  ON_OFF_CONFIG
      9. 8.3.9  Output Voltage Adjustment
      10. 8.3.10 Calibration
      11. 8.3.11 Analog Front End (AFE)
      12. 8.3.12 Voltage Sense Filtering
      13. 8.3.13 DPWM Engine
      14. 8.3.14 Rail/Power Stage Configuration
      15. 8.3.15 DPWM Phase Synchronization
      16. 8.3.16 Output Current Measurement
      17. 8.3.17 Current Sense Input Filtering
      18. 8.3.18 Over-Current Detection
      19. 8.3.19 Input Voltage Monitoring
      20. 8.3.20 Input UV Lockout
      21. 8.3.21 Temperature Monitoring
      22. 8.3.22 Auxiliary ADC Input Monitoring
      23. 8.3.23 Soft Start, Soft Stop Ramp Sequence
      24. 8.3.24 Non-Volatile Memory Error Correction Coding
      25. 8.3.25 Data Logging
    4. 8.4 Device Functional Modes
      1. 8.4.1 4-Bit VID Mode
      2. 8.4.2 6-Bit VID Mode
      3. 8.4.3 8-Bit VID Mode
      4. 8.4.4 Current Foldback Mode
  9. 9 Applications and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Automatic System Identification (Auto-ID)
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Digital Compensator
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSMINNOMMAXUNIT
SUPPLY CURRENT
IV33A Supply current V33A = 3.3 V 8 15 mA
IV33DIO V33DIO = 3.3 V 42 55 mA
IV33 Total V33 supply current, V33A = V33DIO = 3.3 V 54 80 mA
IV33DIO V33D = 3.3 V storing configuration parameters in flash memory 52 65 mA
INTERNAL REGULATOR CONTROLLER INPUTS/OUTPUTS
V33 3.3-V linear regulator Emitter of NPN transistor 3.25 3.3 3.6 V
V33FB 3.3-V linear regulator feedback 4 4.6 V
IV33FB Series pass base drive VIN = 12 V 0.2 0.4 8 mA
Beta Series NPN pass device 40
EXTERNALLY SUPPLIED 3.3 V POWER
V33D, V33DIO1, V33DIO2 Digital 3.3-V power TJ = 25°C 3.0 3.6 V
V33A Analog 3.3-V power TJ = 25°C 3.0 3.6 V
ERROR AMPLIFIER INPUTS EAPn, EANn
VCM Common mode voltage each terminal 0 1.8 V
VERROR Internal error Voltage range AFE_GAIN field of CLA_GAINS = 1X(1) –256 248 mV
EAP-EAN Error voltage digital resolution AFE_GAIN field of CLA_Gains = 8X 1 mV
REA Input Impedance Ground reference, TJ = 25°C 1.5 MΩ
IOFFSET Input offset current 1-kΩ source impedance,TJ = 25°C –5 5 µA
Vref 10-bit DAC
Vref Reference Voltage Setpoint 0 1.7 V
Vrefres Reference Voltage Resolution 1.56 mV
ANALOG INPUTS CS1A, CS2A, CS3A, CS4A,VinMon, Temp1, Temp2, Temp3, Temp4, Addr0, Addr1
VADC_RANGE Measurement range for voltage monitoring Inputs: VinMon, Temp1, Temp2, Temp3, Temp4, CS1A, CS2A, CS3A, CS4A 0 2.6 V
Voffset input offset voltage –27 27 mV
VOC_THRS Over-current comparator threshold voltage range(2) Inputs: CS1A, CS2A, CS3A, CS4A 0.032 2 V
VOC_RES Over-current comparator threshold voltage range Inputs: CS, 1A, CS2A, CS3A, CS4A 31.25 mV
Tempinternal Int. temperature sense accuracy Over range from 0°C to 100°C –15 15 °C
INL ADC integral nonlinearity TJ = -40°C to 125°C –2.5 2.5 mV
Ilkg Input leakage current 3V applied to terminal 100 nA
RIN Input impedance Ground reference 8 MΩ
CIN Current Sense Input capacitance 10 pF
(1) See the UCD92xx PMBus Command Reference for the description of the AFE_GAIN field of CLA_GAINS command.
(2) Can be disabled by setting to '0'