The DCY register stores the value of the PWM duty cycle, 0x00 corresponds to 0%, and 0xFF to 100%. 1LSB corresponds to 0.392%. Power-on default = 0x55, 33.2%.

In a read operation, with the two following exceptions, the returned data are the actual duty cycle (DCY) value driving the PWM-Out pin:

1. When TACH-MODE = 0 and the system is in software-RPM control mode, if the calculated duty cycle is less than 30%, the returned value is the calculated value, not the actual PWM-OUT pin duty cycle which is forced to 30%.
2. When TACH-MODE = 0 and the system is in software DCY-control mode or Auto Temperature-Fan mode, if the calculated duty cycle is less than 7%, the returned value is the calculated value, not the actual PWM-OUT pin duty cycle which is forced to 0%.

In a write operation, the data written are the actual DCY driving the PWM-Out pin in the software DCY control mode. However, in all other control modes, the data being written are not used to drive the PWM. Instead, it is stored in a temporary register, and controls the PWM immediately after the control mode is changed to the software DCY control mode.

This register specifies the PWM frequency and the fan spin-up functions.

Fan Spin Disable Bit: FSPD

This bit enables or disables the spin-up function.

PWM Frequency Bits: [PWM2:PWM0]

These bits specify the PWM frequency; the high range (1kHz–40kHz) has a default value of 25kHz, and the low range (10Hz–94Hz) has a default value of 30Hz. The clock frequency is 3.2MHz. The PWM-MODE pin determines which range is selected. When the PWM mode is tied to ground, the high range is selected; otherwise, the low range is selected.

Spin-Up Time Bits: [STIME2:STIME0]

These bits specify a predetermined time period, or spin-up time, during which the 100% duty cycle is applied to start the fan spinning. These bits are ignored when FSPD = 1.

This register specifies the duty cycle in Auto Temp-Fan Control mode when the control temperature is less than or equal to the value of the Low-Temp bits in the TEMP-FAN Control Register.

This register specifies the parameters of the local Temperature-Fan Control mode.

Low Temperature Bits: [L-TEMP4:L-TEMP0]

These bits specify the low temperature of the local temperature fan control loop. The calculated duty cycle is equal to the value of the DCY-LOW-TEMP register when the local temperature is less than or equal to the value defined by bits [L-TEMP4:L-TEMP0]. Refer to the Auto Temperature Fan Mode section for details.

Slope Bits: [L-SLP2:L-SLP0]

These bits define the increment of the duty cycle when the local temperature rises every 1°C in the auto local temperature-fan control.

This register specifies the parameters of the Remote Temperature-Fan Control mode.

Low Temperature Bits: [R-TEMP4:R-TEMP0]

These bits specify the low temperature of the auto remote temperature-fan control. In this control mode, the duty cycle is equal to the value of the DCY-LOW-TEMP register when the remote temperature is less than or equal to the value defined by bits [R-TEMP4:R-TEMP0].

Slope Bits: [R-SLP2:R-SLP0]

These bits define the increment of the duty cycle when the remote temperature rises every 1°C in the auto remote temperature-fan control.

This register is ignored in the software DCY control mode. This register determines how fast the PWM duty cycle is adjusted to the desired value when the temperature changes in the automatic temperature-fan control, or when the fan speed varies from the predetermined value in the software RPM control mode.

RAMPE: Ramp Enable bit.

This bit is ignored in the software RPM control mode. The duty cycle always gradually ramps to the target value in Software-RPM mode.

Adjustment Step Bits: [STEP1:STEP0]

In the software RPM control, these bits specify the amount that duty cycle changes each time.

In the auto fan temperature control mode, these bits are ignored when RAMPE = 0. When RAMPE = 1, these bits define the maximum amount that the duty cycle can change each time if the duty cycle needs to be adjusted. For example, if the current value of the duty cycle is 50% and the desired value is 75%, the total required increment is 25%. If the step is 1/256 (bits [STEP1:STEP0] = '00'), then the duty cycle increases by 1/256 (0.39%) each time the duty cycle is updated, and the duty cycle reaches the desired value (75%) after 64 updates. This takes eight seconds if the update rate is 8/sec (bits [RATE2:RATE0] = '111'), and takes 64 seconds if the update rate is 1/sec. (bits [RATE2:RATE0] = '100'). However, if the step is 2/256, then the time reduces to half. If the required adjustment is less than the value specified by step bits, the actual required value is used. For example, if the current duty cycle is 50%, the required value is 73%, and the step is 4/256, a total of 15 updates are needed. The duty cycle increases 21.875% after the first 14 updates, and increases 1.125% in the last update.

Updating Rate Bits: [RATE2:RATE0]

These bits define the rate (time/sec) that the duty cycle is recalculated in the auto temp-fan control mode. The value of [RATE2:RATE0] does not affect the ADC conversion rate. Both external and local temperature readings are updated continuously, even if the DCY is updated slowly.

The RPM monitoring rate and DCY updating rate in the software RPM control mode are specified by the TACH-FAST bit of Configuration Register 3. The [RATE2:RATE0] bits are ignored in this mode.

Adjustment Threshold Bits: [THRE1:THRE0]

These bits determine the threshold of the duty cycle adjustment in the auto temp-fan control mode, and are ignored in all other modes. When the auto fan temperature control loop is active, the duty cycle is not adjusted if the required adjustment is less than or equal to the threshold defined by bits [THRE1:THRE0]. This provides a hysteresis to improve the control stability. For example, if the current duty cycle is 50% and the desired value is 71%, the total required increment is 21%. If the step is 4/256 and the threshold is 2/256 (0.78%), the duty cycle reaches 70.31% after 13 updates, 0.6875% less than the desired value. This difference is less than the threshold (0.78%); therefore, the adjustment stops. However, if the threshold is 1/256 (0.39%), then one more update occurs, and the duty cycle increases by 0.39% (1LSB) because 0.39% (1LSB) < 0.6875% < 0.78% (2LSB). Finally, the duty cycle reaches 70.7%, 0.3% less than the desired value because of the limitation of 8-bit resolution.

Note that bits [THRE1:THRE0] are ignored in the software RPM control. In this mode, the DCY adjustment stops when the difference between the TACH data and TACH setting is less than or equal to 0x000A.