JAJSMK8A october   2021  – june 2023 DLPA300

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics Control Logic
    6. 6.6  5-V Linear Regulator
    7. 6.7  Bias Voltage Boost Converter
    8. 6.8  Reset Voltage Buck-Boost Converter
    9. 6.9  VOFFSET Regulator
    10. 6.10 Switching Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 5-V Linear Regulator
      2. 7.3.2 Bias Voltage Boost Converter
      3. 7.3.3 Reset Voltage Buck-Boost Converter
      4. 7.3.4 VOFFSET Regulator
      5. 7.3.5 Serial Communications Port (SCP)
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Component Selection Guidelines
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
    1. 9.1 Power Supply Rail Guidelines
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Grounding Guidelines
    2. 10.2 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 サード・パーティ製品に関する免責事項
    2. 11.2 Device Support
      1. 11.2.1 Device Nomenclature
    3. 11.3 Documentation Support
      1. 11.3.1 Related Documentation
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 サポート・リソース
    6. 11.6 Trademarks
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.3 Application Curves

The power supply sequencing for VBIAS, VOFFSET and VRESET are shown in Figure 8-2 and Figure 8-3. On power-up, the turn on of VBIAS enables the external VRESET voltage regulator. In power-down, when VBIAS powers off, it disables the VRESET regulator, which slowly decays to ground.

The power sequencing for VCC2 voltage regulator is shown in Figure 8-4 and Figure 8-5. The power up of VOFFSET enables the turn on of the VCC2 voltage regulator. As seen in the zoom out of Figure 8-4, the 1.8-V supply is already on and stable. Similarly, the power down of VOFFSET disables the VCC2 voltage regulator. The 1.8-V supply powers down after both VOFFSET and VCC2 are powered down, as seen in the zoom out of Figure 8-5.

GUID-20210928-SS0I-BZTG-9GWR-1DZ1KZVZQTWV-low.pngFigure 8-2 High Voltage Power-Up Sequence
GUID-20210928-SS0I-HJD6-B2V2-HGGQBKBH0CTG-low.pngFigure 8-4 VCC2 Power-Up Sequence
GUID-20210928-SS0I-K7TD-ZH8B-GJB3TQWWD3TB-low.pngFigure 8-3 High Voltage Power-Down Sequence
GUID-20210928-SS0I-MH68-MBNK-CQ8QWPWQHBV8-low.pngFigure 8-5 VCC2 Power-Down Sequence