JAJSMK8A october   2021  – june 2023 DLPA300

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics Control Logic
    6. 6.6  5-V Linear Regulator
    7. 6.7  Bias Voltage Boost Converter
    8. 6.8  Reset Voltage Buck-Boost Converter
    9. 6.9  VOFFSET Regulator
    10. 6.10 Switching Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 5-V Linear Regulator
      2. 7.3.2 Bias Voltage Boost Converter
      3. 7.3.3 Reset Voltage Buck-Boost Converter
      4. 7.3.4 VOFFSET Regulator
      5. 7.3.5 Serial Communications Port (SCP)
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Component Selection Guidelines
      3. 8.2.3 Application Curves
  10. Power Supply Recommendations
    1. 9.1 Power Supply Rail Guidelines
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Grounding Guidelines
    2. 10.2 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 サード・パーティ製品に関する免責事項
    2. 11.2 Device Support
      1. 11.2.1 Device Nomenclature
    3. 11.3 Documentation Support
      1. 11.3.1 Related Documentation
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 サポート・リソース
    6. 11.6 Trademarks
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Thermal Considerations

Thermally bond or solder the DLPA300 package to an external thermal pad on the PWB surface. The recommended dimensions of the thermal pad are 10 mm × 10 mm centered under the device. The metal bottom of the package is tied internally to the substrate at the VRESET_RAIL voltage level. Therefore, the thermal pad on the board must be isolated from any other extraneous circuit or ground and no circuit vias are allowed inside the pad area. Thermal pads are required on both sides of the PWB. Connect the thermal pads together through an array of 5 × 5 thermal vias, 0.5 mm in diameter.

Thermal pads and the thermal vias are connected to VRESET_RAIL and must be isolated from ground, or any other circuit.

Locate an internal P12V plane directly underneath the top layer and have an isolated area under the DLPA300. This isolated area must be a minimum of 20 cm2 and connect to the thermal pad of the DLPA300 through the thermal vias. The potential of the isolated area is also at VRESET_RAIL. The internal ground plane must extend under the DLPA300 to help carry the heat away. Please refer to the PowerPAD Thermally Enhanced Package application report (SLMA002) for details on thermally efficient package design considerations.

Be careful to place the DLPA300 device away from local PWB hotspots. Heat generated from adjacent components may impact the DLPA300 thermal characteristics.