JAJSU28 March 2023 DRV8329-Q1
PRODUCTION DATA
The DRV8329-Q1 family of devices is an integrated three-phase gate driver supporting an input voltage range of 4.5-V to 60-V. These devices decrease system component count, cost, and complexity by integrating three independent half-bridge gate drivers, trickle charge pump, and a charge pump with linear regulator for the supply voltages of the high-side and low-side gate drivers. DRV8329-Q1 also integrates an accurate low voltage regulator (AVDD) capable of supporting 3.3 V at 80 mA output. A hardware interface allows for simple configuration of the motor driver and control of the motor.
The gate drivers support external N-channel high-side and low-side power MOSFETs and can drive up to 1-A source, 2-A sink peak gate drive currents with a 30-mA average output current. A bootstrap circuit with capacitor generates the supply voltage of the high-side gate drive and a trickle charge pump is employed to support 100% duty cycle. The supply voltage of the low-side gate driver is generated using a charge pump with linear regulator GVDD from the PVDD power supply that regulates to 12 V.
In addition to the high level of device integration, the DRV8329-Q1 family of devices provides a wide range of integrated protection features. These features include power supply undervoltage lockout (PVDDUV), regulator undervoltage lockout (GVDDUV), Bootstrap Voltage undervoltage lockout (BSTUV), VDS overcurrent monitoring (OCP), Sense resistor overcurrent monitoring (SEN_OCP) and overtemperature shutdown (TSD). Fault events are indicated by the nFAULT pin.
The DRV8329-Q1 is available in 0.5-mm pitch, 5 × 7 mm 40-pin QFN surface-mount packages.