JAJSJM0B june   2021  – april 2023 JFE150

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 AC Measurement Configurations
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Ultra-Low Noise
      2. 8.3.2 Low Gate Current
      3. 8.3.3 Input Protection
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Protection Diodes
      2. 9.1.2 Capacitive Transducer Input Stage
      3. 9.1.3 Common-Source Amplifier
      4. 9.1.4 Composite Amplifiers
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 10.1.1.3 TI のリファレンス・デザイン
        4. 10.1.1.4 フィルタ設計ツール
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.1.3 Common-Source Amplifier

The common-source amplifier is a commonly used open-loop gain stage for JFET amplifiers. Figure 9-2 shows the basic circuit.

GUID-20210517-CA0I-CDZG-HV9X-NC2CCNRVPWW6-low.gif Figure 9-2 Common-Source Amplifier

Equation 1 shows the equation for gain of the circuit in Figure 9-2.

Equation 1. VOUTVIN= - gm*RD1+gm*RS

Generally, higher gain results in improved noise performance. Gain increases as the bias current is increased as a result of increasing gm (see Figure 6-4). As a result, the input-referred noise decreases as bias current is increased (see Figure 6-9). Any JFET design must make a tradeoff between current consumption and noise performance. The JFE150, however, delivers significantly lower noise performance than most operational amplifiers at the same current consumption. The bias current (IDS) is set by the value of the source resistor, RS, and the threshold voltage, VT, of the JFE150. Figure 9-3 is a graph showing nominal IDS vs RS.

GUID-20210521-CA0I-CDDX-JT3P-HVW73WBGKNDB-low.png Figure 9-3 Drain-to-Source Current vs RS, VDS = 5 V

The bias current varies according to the resistor and threshold voltage tolerances. Additionally, thermal noise associated with RS couples directly into the gain of the circuit, degrading the overall noise performance. To improve the circuit in Figure 9-4, use a current-source biasing scheme. Current-source biasing removes the JFET threshold variation from the biasing scheme, and allows for lower-value filtering capacitance (CS) for equivalent filtering due to the high output impedance of current sources.

GUID-20210518-CA0I-BBQF-QB1C-BC2BGH2Z44XB-low.gif Figure 9-4 Common-Source Amplifier With Current-Source Biasing