The LV family has an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry will be activated for up to 30µs after the minimum supply voltage threshold of 1.5V is crossed, or immediately when the supply voltage drops below 1.5V. When the supply voltage is equal to or greater than the minimum supply voltage, and after the delay period, the comparator output reflects the state of the differential input (VID).
The POR circuit will keep the output high impedance (HI-Z) during the POR period (ton).
Note that it is the nature of an open collector output that the output will rise with the pull-up voltage during the POR period.
A light pull-up (to V+) or pull-down (to GND) resistor can be used to pre-bias the output condition to prevent the output from floating.