JAJSID2F May   2011  – December 2019 LM5050-1 , LM5050-1-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      応用回路
      2.      代表的な冗長電源の構成
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM5050-1
    3. 6.3 ESD Ratings: LM5050-1-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IN, GATE, and OUT Pins
      2. 7.3.2 VS Pin
      3. 7.3.3 OFF Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 ON/OFF Control Mode
      2. 7.4.2 External Power Supply Mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 MOSFET Selection
      2. 8.1.2 Short Circuit Failure of an Input Supply
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application With Input and Output Transient Protection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Supply Components (R1 C1,) Selection
          2. 8.2.1.2.2 MOSFET (Q1) Selection
          3. 8.2.1.2.3 D1 and D2 Selection for Inductive Kick-Back Protection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Using a Separate VS Supply for Low Vin Operation
      3. 8.2.3 ORing of Two Power Sources
      4. 8.2.4 Reverse Input Voltage Protection With IQ Reduction
      5. 8.2.5 Basic Application With Input Transient Protection
      6. 8.2.6 48-V Application With Reverse Input Voltage (VIN = –48 V) Protection
        1. 8.2.6.1 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 関連リンク
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 12 V, VVS = VIN, VOUT = VIN, VOFF = 0 V, CGATE= 47 nF, and TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VS PIN
VVS Operating Supply Voltage Range TJ = –40°C to 125°C 5 75 V
IVS Operating Supply Current VVS= 5 V, VIN = 5 V
VOUT = VIN - 100 mV
TJ = 25°C 75 μA
TJ = –40°C to 125°C 105
VVS= 12 V, VIN = 12 V
VOUT = VIN - 100 mV
TJ = 25°C 100
TJ = –40°C to 125°C 147
VVS= 75 V, VIN = 75 V
VOUT = VIN - 100 mV
TJ = 25°C 130
TJ = –40°C to 125°C 288
IN PIN
VIN Operating Input Voltage Range TJ = –40°C to 125°C 5 75 V
IIN IN Pin current VIN = 5 V
VVS= VIN
VOUT = VIN - 100 mV
GATE = Open
TJ = 25°C 190 μA
TJ = –40°C to 125°C 32 305
VIN = 12 V to 75 V
VVS= VIN
VOUT = VIN - 100 mV
GATE = Open
TJ = 25°C 320
TJ = –40°C to 125°C LM5050MK-1, LM5050Q1MK-1 233 400
TJ = –40°C to 125°C LM5050Q0MK-1 233 475
OUT PIN
VOUT Operating Output Voltage Range TJ = –40°C to 125°C 5 75 V
IOUT OUT Pin Current VIN = 5 V to 75 V
VVS= VIN
VOUT = VIN - 100 mV
TJ = 25°C 3.2 µA
TJ = –40°C to 125°C 8
GATE PIN
IGATE(ON) Gate Pin Source Current VIN = 5 V
VVS = VIN
VGATE = VIN
VOUT = VIN - 175 mV
TJ = 25°C 30 µA
TJ = –40°C to 125°C 12 41
VIN = 12 V to 75 V
VVS = VIN
VGATE = VIN
VOUT = VIN - 175 mV
TJ = 25°C 32
TJ = –40°C to 125°C 20 41
VGS VGATE - VIN in Forward Operation(3) VIN = 5 V
VVS = VIN
VOUT = VIN - 175 mV
TJ = 25°C 7 V
TJ = –40°C to 125°C 4 9
VIN = 12 V to 75 V
VVS = VIN
VOUT = VIN - 175 mV
TJ = 25°C 12
TJ = –40°C to 125°C 9 14
tGATE(REV) Gate Capacitance Discharge Time at Forward to Reverse Transition
See Figure 1
CGATE = 0(1) TJ = 25°C 25 ns
TJ = –40°C to 125°C 85
CGATE = 10 nF(1) TJ = 25°C 60
CGATE = 47 nF(1) TJ = 25°C 180
TJ = –40°C to 125°C 350
tGATE(OFF) Gate Capacitance DischargeTime at OFF pin Low to High Transition
See Figure 2
CGATE = 47 nF(2) TJ = 25°C 486 ns
IGATE(OFF) Gate Pin Sink Current VGATE = VIN + 3 V
VOUT > VIN + 100 mV
t ≤ 10 ms
TJ = 25°C 2.8 A
TJ = –40°C to 125°C LM5050MK-1, LM5050Q1MK-1 1.8
TJ = –40°C to 125°C LM5050Q0MK-1 1.4
VSD(REV) Reverse VSD Threshold
VIN < VOUT
VIN - VOUT TJ = 25°C –28 mV
TJ = –40°C to 125°C –41 –16
ΔVSD(REV) Reverse VSD Hysteresis TJ = 25°C 10 mV
VSD(REG) Regulated Forward VSD Threshold
VIN > VOUT
VIN = 5 V
VVS = VIN
VIN - VOUT
TJ = 25°C 19 mV
TJ = –40°C to 125°C LM5050MK-1, LM5050Q1MK-1 1 37
TJ = –40°C to 125°C LM5050Q0MK-1 1 60
TJ = 25°C 22
VIN = 12 V
VVS = VIN
VIN - VOUT
TJ = –40°C to 125°C LM5050MK-1, LM5050Q1MK-1 4.4 37
TJ = –40°C to 125°C LM5050Q0MK-1 4.4 60
OFF PIN
VOFF(IH) OFF Input High Threshold Voltage VOUT = VIN-500 mV
VOFF Rising
TJ = 25°C 1.56 V
TJ = –40°C to 125°C 1.75
VOFF(IL) OFF Input Low Threshold Voltage VOUT = VIN - 500 mV
VOFF Falling
TJ = 25°C 1.4
TJ = –40°C to 125°C 1.1
ΔVOFF OFF Threshold Voltage Hysteresis VOFF(IH) - VOFF(IL) TJ = 25°C 155 mV
IOFF OFF Pin Internal Pulldown VOFF = 4.5 V TJ = 25°C 5 µA
TJ = –40°C to 125°C 3 7
VOFF = 5 V TJ = 25°C 8
Time from VIN-VOUT voltage transition from 200 mV to -500 mV until GATE pin voltage falls to VIN + 1 V. See Figure 1.
Time from VOFF voltage transition from 0 V to 5 V until GATE pin voltage falls to VIN + 1 V. See Figure 2
Measurement of VGS voltage (that is. VGATE - VIN) includes 1 MΩ in parallel with CGATE.
LM5050-1 LM5050-1-Q1 30104825.gifFigure 1. Gate OFF Timing for Forward to Reverse Transition
LM5050-1 LM5050-1-Q1 30104826.gifFigure 2. Gate OFF Timing for OFF Pin Low to High Transition