JAJSER7D November   2018  – January 2019 LMG1210

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの概略図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
    8. 7.8 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bootstrap Diode Operation
      2. 8.3.2 LDO Operation
      3. 8.3.3 Dead Time Selection
      4. 8.3.4 Overtemperature Protection
      5. 8.3.5 High-Performance Level Shifter
      6. 8.3.6 Negative HS Voltage Handling
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bypass Capacitor
        2. 9.2.2.2 Bootstrap Diode Selection
        3. 9.2.2.3 Handling Ground Bounce
        4. 9.2.2.4 Independent Input Mode
        5. 9.2.2.5 Computing Power Dissipation
      3. 9.2.3 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
  • RVR|19
サーマルパッド・メカニカル・データ
発注情報

9.2.2.5 Computing Power Dissipation

The power dissipation of the LMG1210 can be divided up into three parts. One is the quiescent current which is defined in the Electrical Characteristics table. This is the current consumed when no switching is taking place.

The second is the dynamic power consumed in the internal circuits of the driver at each switching transition regardless of the load on the output. This can be measured by switching the driver with no output load.

The third component is the power used to switch the load capacitance presented by the external FET.

If operating in PWM mode, there is an additional quiescent current consumed in the dead time resistors. The additional current consumed in each dead time pin can be calculated as Equation 8.

Equation 8. Iqdxx = 1.8/(25k + Rext)

The first component, the quiescent power, is given in the Electrical Characteristics table. The second component, the dynamic power dissipation can be calculated as Equation 9.

Equation 9. IINT = IDYN × Fsw

where

  • IDYN is the dynamic current consumption found in the Electrical Characteristics table
  • and Fsw is the switching frequency in MHz.

The third component of the power dissipation is the gate driver power. The current associated to this loss can be calculated given the Qg of the FET as Equation 10:

Equation 10. I FET,g= Qg × Fsw

or alternatively in terms of Ciss as Equation 11:

Equation 11. IFET,g = Ciss × Vsup × Fsw

These current consumption numbers should be calculated for both the high side and low side separately and added together. When a total current consumption is computed, multiplying it by the input supply voltage gives a worst-case approximation for the total power dissipation of the LMG1210. If using a non-zero external gate resistor of value Rg,ext, some of this power will be dissipated in this external resistor, and can be subtracted from the power consumed inside the IC. For further details when calculating total driver power loss see section 2 from Design Considerations for LMG1205 Advanced GaN FET Driver During High-Frequency Operation.

The WQFN package has two thermal pads: one for the low-side die and another for the high-side die. Though there is good thermal coupling between the die and the associated thermal pad, there is very limited thermal coupling between a die and the opposite thermal pad. This means that if power dissipation calculations indicate a die needs improved cooling, the cooling must be focused on cooling the correct thermal pad.