JAJSGP3A December   2018  – December 2019 OPA462

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      OPA462 ブロック図
      2.      最大出力電圧と周波数との関係
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: Table of Graphs
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Status Flag Pin
      2. 7.3.2 Thermal Protection
      3. 7.3.3 Current Limit
      4. 7.3.4 Enable and Disable
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High DAC Gain Stage for Semiconductor Test Equipment
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Improved Howland Current Pump for Bioimpedance Measurements in Multiparameter Patient Monitors
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Thermally-Enhanced PowerPAD Package
      2. 10.1.2 PowerPAD Integrated Circuit Package Layout Guidelines
      3. 10.1.3 Pin Leakage
      4. 10.1.4 Thermal Protection
      5. 10.1.5 Power Dissipation
      6. 10.1.6 Heat Dissipation
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 TINA-TI™ (無料のダウンロード・ソフトウェア)
        2. 11.1.1.2 TI Precision Designs
        3. 11.1.1.3 WEBENCH Filter Designer
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 サポート・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Enable and Disable

If left disconnected, E/D Com is pulled near V– (negative supply) by an internal 10-μA current source. When left floating, E/D is held approximately 2 V above E/D Com by an internal 1-µA source. Even though active operation of the OPA462 results when the E/D and E/D Com pins are not connected, a moderately fast, negative-going signal capacitively coupled to the E/D pin can overpower the 1-µA pullup current and cause device shutdown. This behavior can appear as an oscillation and is encountered first near extreme cold temperatures. If the enable function is not used, a conservative approach is to connect E/D through a 30-pF capacitor to a low impedance source. Another alternative is the connection of an external current source from V+ (positive supply) sufficient to hold the enable level above the shutdown threshold. Figure 60 shows a circuit that connects E/D and E/D Com. The E/D Com pin is limited to (V–) + 100 V to enable the use of digital ground in a application where the OPA462 power supply is ±90 V.

When the E/D pin is dropped to a voltage between 0 V and 0.65 V above the E/D Com pin voltage the output of the OPA462 will become disabled. While in this state the impedance of the output increases to approximately 160 kΩ. Because the inputs are still active, an input signal might be passed to the output of the amplifier. The voltage at the amplifier output is reduced because of a drop across this output impedance, and may appear distorted compared to a normal operation output.

After the E/D pin voltage is raised to a voltage between 2.5 V and 5 V greater than the E/D Com, the output impedance returns to a normal state and the amplifier operates normally.

OPA462 ai_en_ed_com_new.gifFigure 60. E/D and E/D Com