JAJSSI0 December 2023 PCM3140-Q1
ADVANCE INFORMATION
This register is the ASI slot configuration register for channel 2.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | CH2_OUTPUT | CH2_SLOT[5:0] | |||||
R-0h | R/W-0h | R/W-1h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | Reserved | R | 0h | Reserved |
6 | CH2_OUTPUT | R/W | 0h | Channel 2 output line. 0d = Channel 2 output is on the ASI primary output pin (SDOUT) 1d = Channel 2 output is on the ASI secondary output pin (GPIO1 or GPOx) |
5-0 | CH2_SLOT[5:0] | R/W | 1h | Channel 2 slot assignment. 0d = TDM is slot 0 or I2S, LJ is left slot 0 1d = TDM is slot 1 or I2S, LJ is left slot 1 2d to 30d = Slot assigned as per configuration 31d = TDM is slot 31 or I2S, LJ is left slot 31 32d = TDM is slot 32 or I2S, LJ is right slot 0 33d = TDM is slot 33 or I2S, LJ is right slot 1 34d to 62d = Slot assigned as per configuration 63d = TDM is slot 63 or I2S, LJ is right slot 31 |