JAJSHO3D July   2019  – October 2022 SN3257-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dynamic Characteristics
    7. 6.7 Timing Requirements
    8.     Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  IPOFF Leakage Current
    5. 7.5  Transition Time
    6. 7.6  tON (EN) and tOFF (EN) Time
    7. 7.7  tON (VDD) and tOFF (VDD) Time
    8. 7.8  Break-Before-Make Delay
    9. 7.9  Propagation Delay
    10. 7.10 Skew
    11. 7.11 Charge Injection
    12. 7.12 Capacitance
    13. 7.13 Off Isolation
    14. 7.14 Channel-to-Channel Crosstalk
    15. 7.15 Bandwidth
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Beyond Supply Operation
      3. 8.3.3 1.8 V Logic Compatible Inputs
      4. 8.3.4 Powered-off Protection
      5. 8.3.5 Fail-Safe Logic
      6. 8.3.6 Integrated Pull-Down Resistors
    4. 8.4 Device Functional Modes
      1. 8.4.1 Truth Tables
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

VDD = 1.5 V to 5.5 V, GND = 0V, TA = –40°C to +125°C
Typical values are at VDD = 3.3 V, TA = 25°C, (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLY
VDDPower supply voltage1.55.5V
IDDActive supply currentVSEL = 0 V, 1.4 V or VDD
VS = 0 V to 5.5 V		4068μA
IDD_STANDBYSupply current when disabledVEN = 1.4 V or VDD
VS = 0 V to 5.5 V		7.515µA
DC CHARACTERISTICS
RONOn-resistanceVS = 0 V to VDD×2
VS(max) = 5.5 V
ISD = 8 mA
Refer to ON-State Resistance Figure		25Ω
ΔRONOn-resistance match between channelsVS = VDD
ISD = 8 mA
Refer to ON-State Resistance Figure		0.070.8Ω
RON (FLAT) On-resistance flatnessVS = 0 V to VDD
ISD = 8 mA
Refer to ON-State Resistance Figure		12.5Ω
IPOFFPowered-off I/O pin leakage currentVDD =  0 V
VS =  0 V to 3.6 V
VD = 0 V
Refer to Ipoff Leakage Figure		–80.018µA
IS(OFF)
ID(OFF)		OFF leakage currentSwitch Off
VD = 0.8×VDD / 0.2×VDD
VS = 0.2×VDD / 0.8×VDD
Refer to Off Leakage Figure		–9000.03900nA
ID(ON)
IS(ON)		ON leakage currentSwitch On
VD = 0.8×VDD / 0.2×VDD, S pins floating
or
VS = 0.8×VDD / 0.2×VDD, D pins floating
Refer to On Leakage Figure		–9000.01900nA
LOGIC INPUTS
VIHInput logic high1.25.5V
VILInput logic low00.45V
IIHInput high leakage currentVSEL = 1.8 V, VDD1±2μA
IILInput low leakage currentVSEL = 0 V0.2±2μA
RPDInternal pull-down resistor on logic pins6MΩ
CILogic input capacitanceVSEL = 0 V, 1.8 V or VDD
f = 1 MHz		3pF