JAJSSZ5 データシート

JAJSSZ5G March 1993 – February 2024 SN65C1167 , SN65C1168 , SN75C1167 , SN75C1168

PRODUCTION DATA

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）

PW|16
NS|16
N|16

サーマルパッド・メカニカル・データ

発注情報

5.7 Electrical Characteristics, Receiver Section

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER			TEST CONDITIONS		MIN	TYP⁽¹⁾	MAX	UNIT
V_IT+	Positive-going input threshold voltage, differential input						0.2	V
V_IT–	Negative-going input threshold voltage, differential input				−0.2⁽²⁾			V
V_hys	Input hysteresis (V_IT+ – V_IT–)					60		mV
V_IK	Input clamp voltage, RE	SN75C1167	I_I = −18 mA				−1.5	V
V_OH	High-level output voltage		V_ID = 200 mV,	I_OH = −6 mA	3.8	4.2		V
V_OL	Low-level output voltage		V_ID = −200 mV,	I_OL = 6 mA		0.1	0.3	V
I_OZ	High-impedance-state output current	SN75C1167	V_O = VCC or GND			±0.5	±5	µA
I_I	Line input current		Other input at 0 V	V_I = 10 V			1.5	mA
I_I	Line input current		Other input at 0 V	V_I = −10 V			−2.5	mA
I_I	Enable input current, RE	SN75C1167	V_I = V_CC or GND				±1	µA
r_i	Input resistance		V_IC = −7 V to 7 V,	Other input at 0 V	4	17		kΩ
I_CC	Supply current (total package)		No load, Enabled	V_I = V_CC or GND		4	6	mA
I_CC	Supply current (total package)		No load, Enabled	V_IH = 2.4 V or 0.5 V⁽³⁾		5	9	mA

(1) All typical values are at V_CC = 5V and T_A = 25°C.

(2) The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only.

(3) Refer to TIA/EIA-422-B for exact conditions.