JAJSDF4A May   2017  – May 2019 TMP116

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      温度精度
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Two-Wire Interface Timing
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Power Up
      2. 7.3.2 Temperature Result and Limits
    4. 7.4 Device Functional Modes
      1. 7.4.1 Temperature Conversions
        1. 7.4.1.1 Conversion Cycle
        2. 7.4.1.2 Averaging
        3. 7.4.1.3 Continuous Conversion Mode (CC)
        4. 7.4.1.4 Shutdown Mode (SD)
        5. 7.4.1.5 One-Shot Mode (OS)
      2. 7.4.2 Therm and Alert Modes
        1. 7.4.2.1 Alert Mode
        2. 7.4.2.2 Therm Mode
    5. 7.5 Programming
      1. 7.5.1 EEPROM Programming
        1. 7.5.1.1 EEPROM Overview
        2. 7.5.1.2 Programming the EEPROM
      2. 7.5.2 Pointer Register
      3. 7.5.3 I2C and SMBus Interface
        1. 7.5.3.1 Serial Interface
          1. 7.5.3.1.1 Bus Overview
          2. 7.5.3.1.2 Serial Bus Address
          3. 7.5.3.1.3 Writing and Reading Operation
          4. 7.5.3.1.4 Slave Mode Operations
            1. 7.5.3.1.4.1 Slave Receiver Mode
            2. 7.5.3.1.4.2 Slave Transmitter Mode
          5. 7.5.3.1.5 SMBus Alert Function
          6. 7.5.3.1.6 General-Call Reset Function
          7. 7.5.3.1.7 Timeout Function
          8. 7.5.3.1.8 Timing Diagrams
    6. 7.6 Registers Map
      1. 7.6.1 Register Descriptions
        1. 7.6.1.1  Temperature Register (address = 00h) [default reset = 8000h]
          1. Table 5. Temperature Register Field Descriptions
        2. 7.6.1.2  Configuration Register (address = 01h) [Factory default reset = 0220h]
          1. Table 6. Configuration Register Field Descriptions
        3. 7.6.1.3  High Limit Register (address = 02h) [Factory default reset = 6000h]
          1. Table 8. High Limit Register Field Descriptions
        4. 7.6.1.4  Low Limit Register (address = 03h) [Factory default reset = 8000h]
          1. Table 9. Low Limit Register Field Descriptions
        5. 7.6.1.5  EEPROM Unlock Register (address = 04h) [reset = 0000h]
          1. Table 10. EEPROM Unlock Register Field Descriptions
        6. 7.6.1.6  EEPROM1 Register (address = 05h) [reset = XXXXh]
          1. Table 11. EEPROM1 Register Field Descriptions
        7. 7.6.1.7  EEPROM2 Register (address = 06h) [reset = XXXXh]
          1. Table 12. EEPROM2 Register Field Descriptions
        8. 7.6.1.8  EEPROM3 Register (address = 07h) [reset = 0000h]
          1. Table 13. EEPROM3 Register Field Descriptions
        9. 7.6.1.9  EEPROM4 Register (address = 08h) [reset = XXXXh]
          1. Table 14. EEPROM4 Register Field Descriptions
        10. 7.6.1.10 Device ID Register (address = 0Fh) [reset = 1116h]
          1. Table 15. Device ID Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Typical Application
        1. 8.1.1.1 Design Requirements
        2. 8.1.1.2 Detailed Design Procedure
          1. 8.1.1.2.1 Noise and Averaging
          2. 8.1.1.2.2 Self-Heating Effect (SHE)
          3. 8.1.1.2.3 Synchronized Temperature Measurements
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4.2.1 Alert Mode

When the T/nA bit in the configuration register is set to 0, the device is in alert mode. In this mode, the device compares the conversion result at the end of every conversion with the values in the low limit register and high limit register. If the temperature result exceeds the value in the high limit register, the HIGH_Alert status flag in the configuration register is set. On the other hand, if the temperature result is lower than the value in the low limit register, the LOW_Alert status flag in the configuration register is set. As shown in Figure 23, in alert mode the status flags can be cleared by performing an I2C read of the configuration register.

Configuring the device in alert mode also affects the behaviour of the ALERT pin. In this mode, the device asserts the ALERT pin when either the HIGH_Alert or the LOW_Alert status flag is set as shown in Figure 23. The ALERT pin can be deasserted by either performing an I2C read of the configuration register (which also clears the status flags) or by performing an SMBus alert response command (see the SMBus Alert Function section). The polarity of the ALERT pin can be changed by using the POL bit setting in the configuration register.

This mode effectively makes the device behave like a window limit detector and can be used in applications where detecting if the temperature goes outside of the specified range is needed.

TMP116 TMP116N sbos740_figure1.gifFigure 23. Alert Mode Timing Diagram