The TMP4718 has a standard bidirectional I²C interface that can be configured or read by a controller. Each target on the I²C bus has a specific device address to differentiate between other target devices that are on the same I²C bus. Many target devices require configuration upon start-up to set the behavior of the device. This is typically done when the controller accesses internal register maps of the target, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read. The TMP4718 includes 50-ns glitch suppression filters, allowing the device to coexist on I3C mixed bus.

The physical I²C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to a supply through a pullup resistor. The size of the pullup resistor is determined by the amount of capacitance on the I²C lines. See also the I2C Bus Pullup Resistor Calculation application note. Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition (see Figure 8-10 and Figure 8-11). See the Adjustable Default T_CRIT High-Temperature LimitAdjustable Default T_CRIT High-Temperature LimitFault QueueOne-Shot ConversionsInterrupt and Comparator ModeShutdown ModeContinuous Conversion ModeProgrammingTemperature Data FormatI²C and SMBus InterfaceDevice AddressBus TransactionsWritesReadsAdjustable Default T_CRIT High-Temperature Limit and Adjustable Default T_CRIT High-Temperature LimitAdjustable Default T_CRIT High-Temperature LimitFault QueueOne-Shot ConversionsInterrupt and Comparator ModeShutdown ModeContinuous Conversion ModeProgrammingTemperature Data FormatI²C and SMBus InterfaceDevice AddressBus TransactionsWritesReadsAdjustable Default T_CRIT High-Temperature Limit sections for detail procedures on how the controller can access the TMP4718.

Figure 8-10 Definition of Start and Stop Conditions

Figure 8-11 Bit Transfer