SLVSFN6 December   2020 TPS54622-EP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency PWM Control
      2. 7.3.2  Continuous Current Mode Operation (CCM)
      3. 7.3.3  VIN and Power VIN Pins (VIN and PVIN)
      4. 7.3.4  Voltage Reference
      5. 7.3.5  Adjusting the Output Voltage
      6. 7.3.6  Safe Start-Up Into Prebiased Outputs
      7. 7.3.7  Error Amplifier
      8. 7.3.8  Slope Compensation
      9. 7.3.9  Enable and Adjusting Undervoltage Lockout
      10. 7.3.10 Adjustable Switching Frequency and Synchronization (RT/CLK)
      11. 7.3.11 Slow Start (SS/TR)
      12. 7.3.12 Power Good (PWRGD)
      13. 7.3.13 Output Overvoltage Protection (OVP)
      14. 7.3.14 Overcurrent Protection
        1. 7.3.14.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.14.2 Low-Side MOSFET Overcurrent Protection
      15. 7.3.15 Thermal Shutdown
      16. 7.3.16 Small Signal Model for Loop Response
      17. 7.3.17 Simple Small Signal Model for Peak Current Mode Control
      18. 7.3.18 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Adjustable Switching Frequency (RT Mode)
      2. 7.4.2 Synchronization (CLK Mode)
      3. 7.4.3 Bootstrap Voltage (BOOT) and Low Dropout Operation
      4. 7.4.4 Sequencing (SS/TR)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedures
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Operating Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Slow-Start Capacitor Selection
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Undervoltage Lockout Setpoint
        9. 8.2.2.9  Output Voltage Feedback Resistor Selection
          1. 8.2.2.9.1 Minimum Output Voltage
        10. 8.2.2.10 Compensation Component Selection
        11. 8.2.2.11 Fast Transient Considerations
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Estimated Circuit Area
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
      2. 11.1.2 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.9 Enable and Adjusting Undervoltage Lockout

The EN pin provides electrical on/off control of the device. Once the EN pin voltage exceeds the threshold voltage, the device starts operation. If the EN pin voltage is pulled below the threshold voltage, the regulator stops switching and enters low Iq state.

The EN pin has an internal pullup current source, allowing the user to float the EN pin for enabling the device. If an application requires controlling the EN pin, use open-drain or open collector output logic to interface with the pin.

The device implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO threshold has a hysteresis of 150 mV.

If an application requires either a higher UVLO threshold on the VIN pin or a secondary UVLO on the PVIN, in split rail applications, then the EN pin can be configured as shown in Figure 7-1, Figure 7-2, and Figure 7-3. When using the external UVLO function, TI recommends setting the hysteresis to be greater than 500 mV.

The EN pin has a small pullup current Ip which sets the default state of the pin to enable when no external components are connected. The pullup current is also used to control the voltage hysteresis for the UVLO function since it increases by Ih once the EN pin crosses the enable threshold. The UVLO thresholds can be calculated using Equation 2 and Equation 3.

GUID-39C5A35A-0129-4792-A133-31D808CD7E46-low.gifFigure 7-1 Adjustable VIN Undervoltage Lockout
GUID-25E5A61F-6777-4292-9FD0-CBFABD5AD70C-low.gifFigure 7-2 Adjustable PVIN Undervoltage Lockout, VIN ≥ 4.5 V
GUID-39C5A35A-0129-4792-A133-31D808CD7E46-low.gifFigure 7-3 Adjustable VIN and PVIN Undervoltage Lockout
Equation 2. GUID-46279BD7-C6A4-41C3-87D2-4FCE6338459B-low.gif
Equation 3. GUID-B2D02A9F-494D-44AD-AA9A-0E4FABFDE6B0-low.gif

where

  • Ih = 3.4 μA
  • Ip = 1.15 μA
  • VENRISING = 1.21 V
  • VENFALLING = 1.17 V