JAJSHS4B August   2019  – December 2019 TPS66020 , TPS66021

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     機能表
      1.      TPS6602x ブロック図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Recommended Supply Load Capacitance
    5. 6.5  Thermal Information
    6. 6.6  PP5V Power Switch Characteristics
    7. 6.7  PPHV Power Switch Characteristics
    8. 6.8  Power Path Supervisory
    9. 6.9  VBUS LDO Characteristics
    10. 6.10 Thermal Shutdown Characteristics
    11. 6.11 Input-output (I/O) Characteristics
    12. 6.12 Power Consumption Characteristics
    13. 6.13 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 5-V Source (PP5V Power Path)
        1. 8.3.1.1 PP5V Current Limit
        2. 8.3.1.2 PP5V Reverse Current Protection (RCP)
      2. 8.3.2 20-V Sink (PPHV Power Path)
        1. 8.3.2.1 PPHV Soft Start
        2. 8.3.2.2 PPHV Reverse Current Protection (RCP)
      3. 8.3.3 Overtemperature Protection
      4. 8.3.4 VBUS Overvoltage Protection (OVP)
      5. 8.3.5 Power Management and Supervisory
        1. 8.3.5.1 Supply Connections
        2. 8.3.5.2 Power Up Sequences
          1. 8.3.5.2.1 Normal Power Up
          2. 8.3.5.2.2 Dead Battery Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Transitions
        1. 8.4.1.1 DISABLED State
        2. 8.4.1.2 SRC 1.5-A State
        3. 8.4.1.3 SRC 3-A State
        4. 8.4.1.4 SNK State
        5. 8.4.1.5 FRS (Fast Role Swap) State
      2. 8.4.2 SRC FAULT State
      3. 8.4.3 SNK FAULT State
      4. 8.4.4 Device Functional Mode Summary
      5. 8.4.5 Enabling the PP5V Source Path
      6. 8.4.6 Enabling the PPHV Sink Path
      7. 8.4.7 Fast Role Swap (FRS)
        1. 8.4.7.1 Overview
        2. 8.4.7.2 Fast Role Swap Use Cases
        3. 8.4.7.3 Fast Role Swap Sequence
      8. 8.4.8 Faults
        1. 8.4.8.1 Fault Types
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Current Reference Resistor (RIREF)
        2. 9.2.2.2 External VLDO Capacitor (CVLDO)
        3. 9.2.2.3 PP5V Power Path Capacitance
        4. 9.2.2.4 PPHV, VBUS Power Path Capacitance
        5. 9.2.2.5 VBUS TVS Protection (Optional)
        6. 9.2.2.6 VBUS Schottky Diode Protection (Optional)
        7. 9.2.2.7 VBUS Overvoltage Protection (Optional)
        8. 9.2.2.8 Dead Battery Support
        9. 9.2.2.9 Fast Role Swap (FRS) (Optional)
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連リンク
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ

Faults

The TPS6602x includes a fault pin, FLT. The FLT pin is an open-drain output and requires an external pull-up resistor. If the FLT pin is not required, it may be tied to GND or left floating. The FLT pin will be asserted low only under certain conditions and not all fault conditions will assert the FLT pin, see Table 3. If the FLT pin is asserted, it will remain asserted for a minimum of tHOLD_FLT regardless if the fault condition is removed. After tHOLD_FLT, if all fault conditions have surpassed, the FLT pin is released.