JAJSBF8B June 2011 – April 2018 TPS54478
PRODUCTION DATA.
The RT/CLK pin is used to synchronize the converter to an external system clock. See Figure 29. To implement the synchronization feature in a system, connect a square wave to the RT/CLK pin with an on time of at least 75ns. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the mode returns to the frequency set by the resistor. The square wave amplitude at this pin must transition lower than 0.6 V and higher than 1.6 V typically. The synchronization frequency range is 300 kHz to 2000 kHz. The rising edge of the PH is synchronized to the falling edge of RT/CLK pin.