JAJSVH5N December   2003  – February 2025 SN74AVC2T45

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics: VCCA = 1.2V
    7. 5.7  Switching Characteristics: VCCA = 1.5V ±0.1V
    8. 5.8  Switching Characteristics: VCCA = 1.8V ±0.15V
    9. 5.9  Switching Characteristics: VCCA = 2.5V ±0.2V
    10. 5.10 Switching Characteristics: VCCA = 3.3V ±0.3V
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Characteristics
      1. 5.12.1 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 1.2V
      2. 5.12.2 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 1.5V
      3. 5.12.3 Typical Propagation Delay (A-to-B) vs Load Capacitance, TA = 25°C, VCCA = 1.8V
      4. 5.12.4 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 2.5V
      5. 5.12.5 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 3.3V
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VCC Isolation
      2. 7.3.2 2-Rail Design
      3. 7.3.3 IO Ports are 4.6-V Tolerant
      4. 7.3.4 Partial-Power-Down Mode
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Enable Times
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.2 ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)±8000V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)±1000
Machine Model (MM), Per JEDEC specification JESD22-A115-A±200
(1) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.