We can check if SPI is
working correctly. Make sure the Address length is 16, packet length is
24, packet order as Address first, packet type as MSB first, enable
state as Active low, Data latch on positive edge for write and negative
edge for read also check the physical SPI Driver connection and SPI and
GPIO Logic for AFE works at 1.8V.
If all the settings are
as expected, next step is to probe the SEN, SCLK, SDI, SDO and check for
waveform level and timing data to make sure proper functionality for SPI
Driver and AFE.
If Timing and Level of
SEN, SCLK and SDI is expected and if AFE is not responding and if SDO is
low. Do HW Reset of the AFE and write SPI write for configuring 4 wire
or 3 wire mode depend upon your system need.
Check for device input
voltage levels and check for device reset state current level.
Incorrect LSB readout: Check for
the above-mentioned SPI setting and check the timing of the SDO, SCLK and SEN.
For debug purpose we can call any of the chip readout separately and Probe the
SPI Pins. SEN need to be held one more extra clock cycle with the last SCLK
edge.
Before moving forward with the
AFE bring-up process, it is important to verify the implementation of SPI Burst
write. This is essential because SPI Burst write is utilized in various aspects
of the AFE bring-up, and any issue with the implementation can potentially lead
to macro error later on. There is certain macro operation which involves loading
and verifying the success of burst write operation. To verify we can use a fix
bus write sequence and read the register sequentially. SPIBurstWrite 0010,
[01,02,03,04,05,06,07,08,09,0A] then, read SPI address from 0x10 to 0x19 and
confirm if readout is as expected. Later set all address back to zero.