SDAA199 December   2025 AM620-Q1 , AM625 , AM625-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Software Architecture
  6. 3 Sound Card Information
  7. 4 McASP - External Signals
  8. 5 MCASP Clock Generation and Configurations
  9. 6 Dummy Sound Card DTS Changes
  10. 7 Single DAI Link or a Single Sound Card
  11. 8 Multiple DAI Links - Single Card but Multiple Sub-Devices
  12. 9 MCASP - Practical Examples
  13. 10McASP as a Receiver
    1. 10.1 ADC or Codec as Clock Master
    2. 10.2 Device Tree Changes - Codec as Master and MCASP as Slave
  14. 11MCASP as Transmitter
    1. 11.1 Device Tree Changes - With Codec as Slave and MCASP as Master
  15. 12References

10.1 ADC or Codec as Clock Master

If the ADC must be configured as a clock master, then it will be the device generating all clocks. It has been established that the device will be connected to McASP’s Rx clock pins, as shown in the following figure.

ADC as Clock Master Figure 10-1 ADC as Clock Master