SLAAED5 june   2023 AFE11612-SEP , INA240-SEP , OPA4H199-SEP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. LDMOS and GaN Power Amplifier FET PA Basics
  5. VGS Compensation
  6. Sequencing
  7. An Integrated PA Biasing Solution
  8. Negative GaN Biasing
  9. VDRAIN Switching Circuit
  10. Controlled Gate Sequencing Circuit
  11. VDRAIN Monitoring
  12. IDQ Monitoring
  13. 10External Negative Power Supply Monitoring
  14. 11PA Temperature Monitoring
  15. 12Summary
  16. 13References

Negative GaN Biasing

The AFE11612-SEP features twelve 12-bit DACs. The device has an internal 2.5-V reference that scales the DAC output range from 0 V to 5 V. GaN PAs require negative gate voltage to be properly biased, with pinch-off voltages being more negative than the on voltages. The DAC output can be converted to a negative voltage through the use of a differential op-amp circuit that is powered by a negative power supply (VSS). The following circuit uses the op-amp OPA4H199-SEP to offset and scale the 5-V output range to -7.5 V to 0 V. A differential op-amp circuit is used to protect the PA in case of an alarm shutdown. In an alarm state, the DAC drives the voltage to 0 V. The differential circuit outputs -7.5V to the GaN gate, thus ensuring the GaN PA turns off. The use of an inverting amplifier configuration is not recommended as the off state drives the output to 0 V, which can damage the PA in an alarm state.

The AFE11612-SEP 2.5 V reference output provides the offset voltage for the differential circuit. The resistors in the circuit were selected with the purpose of providing a -7.5 V to 0 V output range, while not significantly loading VREF. The OPA4H199-SEP has a 40-V supply range, and the circuit can be modified to support greater negative-voltage applications if needed.

GUID-20230608-SS0I-WPBJ-W7JL-XKDTKXVWCLH7-low.svg Figure 5-1 Differential Operational Amplifier Circuit
GUID-20230522-SS0I-P5QR-HMSG-VLFRGNRQT1GB-low.svg Figure 5-2 Differential Operational Amplifier Output