Figure 3-1 shows a simplified schematic of the AFE539A4EVM board. Two 16-pin connectors provide access to all of the DAC pins. The GPIO, I²C, and SPI signals from the on-board controller are connected to the AFE through three level translators. Each level translator can be independently disabled to disconnect the on-board controller GPIO, I²C, and SPI signals from the AFE signals while the AFE is running in stand-alone mode.

The default hardware is set up per AFE539A4 recommended configuration guidelines. The AEN pin is connected to VDD with a pull-up resistor to hardware enable the ADC.

AIN2 pin which is a comparator input is connected by default to VDD. With a pull-up resistor.

FB1 and OUT1 pins are connected together through R6 resistor to enable closed loop amplifier output. Disconnect R6 resistor if this feature is undesirable.

AIN0 pin is the ADC input pin.

For more details please refer to AFE539A4 data sheet or to AFE539A4EVM schematic.

Figure 2-1 AFE539A4EVM Hardware Simplified Schematic